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| author | Tomasz Figa <t.figa@samsung.com> | 2013-04-24 19:02:54 +0200 |
|---|---|---|
| committer | Chanho Park <chanho61.park@samsung.com> | 2014-03-20 17:34:16 +0900 |
| commit | 43ab12eafafaae16cef53e76be22eeb247021782 (patch) | |
| tree | 2f7bcc6da2ec292e5610a08846962f7acd771516 /drivers/clk | |
| parent | 9cab4389e3523974f81b4d81d78fc0fe6f08b514 (diff) | |
| download | linux-3.10-43ab12eafafaae16cef53e76be22eeb247021782.tar.gz linux-3.10-43ab12eafafaae16cef53e76be22eeb247021782.tar.bz2 linux-3.10-43ab12eafafaae16cef53e76be22eeb247021782.zip | |
clk: samsung: exynos4: Do not disable ISP bus clocks
Some ISP bus clocks must be kept enabled when entering sleep mode,
otherwise the system hangs. This patch adds CLK_IGNORE_UNUSED flags to
those clocks to keep them ungated when FIMC IS driver is not present.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 5858ffd3b50..43442522bb1 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -847,13 +847,13 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { E4X12_GATE_IP_PERIR, 16, 0, 0, "keypad"), GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0), GATE(sclk_pwm_isp, "sclk_pwm_isp", "div_pwm_isp", - E4X12_SRC_MASK_ISP, 0, CLK_SET_RATE_PARENT, 0), + E4X12_SRC_MASK_ISP, 0, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0), GATE(sclk_spi0_isp, "sclk_spi0_isp", "div_spi0_isp_pre", - E4X12_SRC_MASK_ISP, 4, CLK_SET_RATE_PARENT, 0), + E4X12_SRC_MASK_ISP, 4, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0), GATE(sclk_spi1_isp, "sclk_spi1_isp", "div_spi1_isp_pre", - E4X12_SRC_MASK_ISP, 8, CLK_SET_RATE_PARENT, 0), + E4X12_SRC_MASK_ISP, 8, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0), GATE(sclk_uart_isp, "sclk_uart_isp", "div_uart_isp", - E4X12_SRC_MASK_ISP, 12, CLK_SET_RATE_PARENT, 0), + E4X12_SRC_MASK_ISP, 12, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0), GATE(pwm_isp_sclk, "pwm_isp_sclk", "sclk_pwm_isp", E4X12_GATE_IP_ISP, 0, 0, 0), GATE(spi0_isp_sclk, "spi0_isp_sclk", "sclk_spi0_isp", |