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| author | Pawel Osciak <p.osciak@samsung.com> | 2010-08-10 18:02:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-11 08:59:10 -0700 |
| commit | 9fa424a40186ef3e8a6573aa1c1dd46c94c66012 (patch) | |
| tree | 5de3ea832a1600e00bc91287cd280b77c48c99ba /arch | |
| parent | cd7d7e0244955a4694d1e79e8c8a9bef163d6305 (diff) | |
| download | linux-3.10-9fa424a40186ef3e8a6573aa1c1dd46c94c66012.tar.gz linux-3.10-9fa424a40186ef3e8a6573aa1c1dd46c94c66012.tar.bz2 linux-3.10-9fa424a40186ef3e8a6573aa1c1dd46c94c66012.zip | |
s3c-fb: correct FRAMESEL1 bitfield defines for VIDINTCON0 register
FRAMESEL1 bitfield starts on 13th bit, not on 14th.
Signed-off-by: Pawel Osciak <p.osciak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: InKi Dae <inki.dae@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-fb.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index f4259e52336..ac10013959b 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -292,11 +292,11 @@ #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15) -#define VIDINTCON0_FRAMESEL1 (1 << 14) -#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 14) -#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 14) -#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 14) -#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 14) +#define VIDINTCON0_FRAMESEL1 (1 << 13) +#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13) +#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13) +#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13) +#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13) #define VIDINTCON0_INT_FRAME (1 << 12) #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) |