summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-23 08:03:09 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-23 08:03:09 -0700
commitb0dcb4a91ddb79f2e213205cf8d86b467f8559c7 (patch)
tree4e39332805ae940963bf09efd22c6949bbe793b6 /arch
parent59fcbddaff6f862cc1584b488866d9c4a5579085 (diff)
parent345953cf9a44b19c98f8c0fe6ca7724202bcdb94 (diff)
downloadlinux-3.10-b0dcb4a91ddb79f2e213205cf8d86b467f8559c7.tar.gz
linux-3.10-b0dcb4a91ddb79f2e213205cf8d86b467f8559c7.tar.bz2
linux-3.10-b0dcb4a91ddb79f2e213205cf8d86b467f8559c7.zip
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc: powerpc/mm: Fix Respect _PAGE_COHERENT on classic ppc32 SW TLB load machines
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/head_32.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7db2e42d97a..d794a637e42 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -513,6 +513,9 @@ InstructionTLBMiss:
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_IMISS
tlbli r3
@@ -587,6 +590,9 @@ DataLoadTLBMiss:
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
tlbld r3
@@ -655,6 +661,9 @@ DataStoreTLBMiss:
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
li r1,0xe05 /* clear out reserved bits & PP lsb */
andc r1,r3,r1 /* PP = user? 2: 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
tlbld r3