diff options
| author | David Daney <david.daney@cavium.com> | 2013-02-16 23:42:43 +0100 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-19 09:36:36 +0100 |
| commit | 1e7decdb27ae89b2a0626635a8cf527f930bff1c (patch) | |
| tree | 6c59de5d008b7021331c3f49348510e6adb6607e /arch | |
| parent | 27ea052acb9eaca98cc90bf1b8738b6d0ea5bc2f (diff) | |
| download | linux-3.10-1e7decdb27ae89b2a0626635a8cf527f930bff1c.tar.gz linux-3.10-1e7decdb27ae89b2a0626635a8cf527f930bff1c.tar.bz2 linux-3.10-1e7decdb27ae89b2a0626635a8cf527f930bff1c.zip | |
MIPS: Probe for and report hardware virtualization support.
The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23]. Probe for this and report it in
/proc/cpuinfo.
Signed-off-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4904/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/cpu-features.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/proc.c | 1 |
5 files changed, 9 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 00171cddb6d..c6f64ef0681 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -263,4 +263,8 @@ #define cpu_has_perf_cntr_intr_bit (cpu_data[0].options & MIPS_CPU_PCI) #endif +#ifndef cpu_has_vz +#define cpu_has_vz (cpu_data[0].ases & MIPS_ASE_VZ) +#endif + #endif /* __ASM_CPU_FEATURES_H */ diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 2de2fee16cc..4dff3378d96 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -336,6 +336,6 @@ enum cpu_type_enum { #define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */ #define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */ #define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */ - +#define MIPS_ASE_VZ 0x00000080 /* Virtualization ASE */ #endif /* _ASM_CPU_H */ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 9f47cda632a..5df4cda4991 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -596,6 +596,7 @@ #define MIPS_CONF3_RXI (_ULCAST_(1) << 12) #define MIPS_CONF3_ULRI (_ULCAST_(1) << 13) #define MIPS_CONF3_ISA (_ULCAST_(3) << 14) +#define MIPS_CONF3_VZ (_ULCAST_(1) << 23) #define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0) #define MIPS_CONF4_MMUEXTDEF (_ULCAST_(3) << 14) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ba169022fe1..0c69d1d1408 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -442,6 +442,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) c->options |= MIPS_CPU_ULRI; if (config3 & MIPS_CONF3_ISA) c->options |= MIPS_CPU_MICROMIPS; + if (config3 & MIPS_CONF3_VZ) + c->ases |= MIPS_ASE_VZ; return config3 & MIPS_CONF_M; } diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 239ae03f333..453d55699fe 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -74,6 +74,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); + if (cpu_has_vz) seq_printf(m, "%s", " vz"); seq_printf(m, "\n"); seq_printf(m, "shadow register sets\t: %d\n", |