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authorShaohua Li <shaohua.li@intel.com>2006-03-23 02:59:53 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-23 07:38:06 -0800
commit7c5c1e427b5e83807fd05419d1cf6991b9d87247 (patch)
tree780820efe1aa9ef26e756c157b14de9d3f84649f /arch
parentf2d0d263b51d13efe55f0aae9254b69ba2855f1c (diff)
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[PATCH] x86: deterine xapic using apic version
Checking APIC version instead of CPU family to determine XAPIC. Family 6 CPU could have xapic as well. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: "Seth, Rohit" <rohit.seth@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/io_apic.c3
-rw-r--r--arch/i386/kernel/mpparse.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 39d9a5fa907..fd1c60cfd29 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -1761,7 +1761,8 @@ static void __init setup_ioapic_ids_from_mpc(void)
* Don't check I/O APIC IDs for xAPIC systems. They have
* no meaning without the serial APIC bus.
*/
- if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && boot_cpu_data.x86 < 15))
+ if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+ || APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
return;
/*
* This is broken; anything with a real cpu count has to
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index e85e463af7c..8d8aa9d1796 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -937,7 +937,8 @@ void __init mp_register_ioapic (
mp_ioapics[idx].mpc_apicaddr = address;
set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
- if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 < 15))
+ if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+ && !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
tmpid = io_apic_get_unique_id(idx, id);
else
tmpid = id;