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authorVivek Gautam <gautam.vivek@samsung.com>2014-05-15 21:38:01 (GMT)
committerHyungwon Hwang <human.hwang@samsung.com>2014-12-17 07:18:11 (GMT)
commit6209a603a3787035eee93b99a0d9152c20529e9a (patch)
tree0507bbd6e3d6e1b57c2f0ae15bed42da62e38007 /arch
parent6d2635c7e583ae1693473d14caf89716c21dba8b (diff)
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ARM: dts: Enable support for DWC3 controller for exynos5420
Add device tree nodes for DWC3 controller present on Exynos 5420 SoC, to enable support for USB 3.0. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 86df495..b8fb3fd 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -781,6 +781,23 @@
clock-names = "secss";
};
+ usbdrd3_0: usb@12000000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock CLK_USBD300>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <0 72 0>;
+ phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+ };
+
usbdrd_phy0: phy@12100000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12100000 0x100>;
@@ -790,6 +807,23 @@
#phy-cells = <1>;
};
+ usbdrd3_1: usb@12400000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock CLK_USBD301>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x12400000 0x10000>;
+ interrupts = <0 73 0>;
+ phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+ };
+
usbdrd_phy1: phy@12500000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12500000 0x100>;