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authorHyungwon Hwang <human.hwang@samsung.com>2014-11-21 10:16:48 (GMT)
committerHyungwon Hwang <human.hwang@samsung.com>2014-12-18 05:29:56 (GMT)
commit214b8cdac2b2869afd8c8b915b925ad3b5e14492 (patch)
tree48e9e90f425e892d84374263053e0be38ebdbf29 /arch
parent1062443d6cde74f2d265757b2e368df3aa7cc0e6 (diff)
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ARM: exynos: fix UART address selection for DEBUG_LLrefs/changes/32/30632/9
The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using A7, it can't detect right UART physical address only the part number of CP15. It's possible to solve as checking Cluster ID additionally. Change-Id: I1a227bf1186a988f7a8429ee3b5251528d0ee32a Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/debug/exynos.S6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S
index b17fdb7..60bf3c2 100644
--- a/arch/arm/include/debug/exynos.S
+++ b/arch/arm/include/debug/exynos.S
@@ -24,7 +24,11 @@
mrc p15, 0, \tmp, c0, c0, 0
and \tmp, \tmp, #0xf0
teq \tmp, #0xf0 @@ A15
- ldreq \rp, =EXYNOS5_PA_UART
+ beq 100f
+ mrc p15, 0, \tmp, c0, c0, 5
+ and \tmp, \tmp, #0xf00
+ teq \tmp, #0x100 @@ A15 + A7 but boot to A7
+100: ldreq \rp, =EXYNOS5_PA_UART
movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
ldr \rv, =S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0