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authorLukasz Majewski <l.majewski@samsung.com>2014-04-11 13:52:09 +0200
committerChanho Park <chanho61.park@samsung.com>2014-11-18 11:47:28 +0900
commitb4bd5a8ee514f1573fdd4ec00f7b77d623dedbf5 (patch)
tree04251eca7b423ef6d76feea6a53320e800a3e2e2 /arch
parent619b370f569ba6d3d05c175c1fe0dbc311f1d74b (diff)
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cpuidle:AFTR: Enable STANDBY_WFI0 and STANDBY_WFE0 for cpu0 in AFTR mode
Enabling of CORE0 idle state is based on the state of STANDBYWFI/STANDBYWFE internal signal. Change-Id: I43675fa312ce879f3741644057991bdb33f6cd55 Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/cpuidle.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 11c3db7b165..ca26770683f 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -107,6 +107,10 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
{
unsigned long tmp;
+ if (soc_is_exynos4412())
+ __raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
+ S5P_CENTRAL_SEQ_OPTION);
+
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */