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| author | Hyungwon Hwang <human.hwang@samsung.com> | 2014-08-19 21:29:23 +0900 |
|---|---|---|
| committer | hyungwon hwang <human.hwang@samsung.com> | 2014-08-19 22:04:22 -0700 |
| commit | f17176f18b72490f0db48a861b1060002774f157 (patch) | |
| tree | 6933cb3d3d1c9698cb34ce744b2207665ab7bd45 /arch | |
| parent | c39239e152fbfe5f0373544a614dae2744d97d44 (diff) | |
| download | linux-3.10-f17176f18b72490f0db48a861b1060002774f157.tar.gz linux-3.10-f17176f18b72490f0db48a861b1060002774f157.tar.bz2 linux-3.10-f17176f18b72490f0db48a861b1060002774f157.zip | |
dts: exynos3250: Add Exynos DRM GSC device node
This patch adds Exynos DRM GSC device nodes and the corresponding IOMMU
device nodes for the boards which uses Exynos 3250 processor.
Change-Id: I846494b03922896db45f5faec8265e15be46273f
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 8c176a8d09a..7f787f5f0d8 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -353,6 +353,44 @@ interrupts = <0 240 0>; }; + exynos_drm_gsc1: gsc@11850000 { + compatible = "samsung,exynos3250-drm-gsc"; + reg = <0x11850000 0x1000>; + clocks = <&cmu CLK_GSCALER0>; + clock-names = "gscl"; + interrupts = <0 167 0>; + iommu = <&smmu_gsc0>; + samsung,power-domain = <&pd_cam>; + }; + + exynos_drm_gsc2: gsc@11860000 { + compatible = "samsung,exynos3250-drm-gsc"; + reg = <0x11860000 0x1000>; + clocks = <&cmu CLK_GSCALER1>; + clock-names = "gscl"; + interrupts = <0 168 0>; + iommu = <&smmu_gsc1>; + samsung,power-domain = <&pd_cam>; + }; + + smmu_gsc0: sysmmu@11a20000 { + compatible = "samsung,exynos4210-sysmmu"; + reg = <0x11a20000 0x1000>; + interrupts = <0 152 0>, <0 157 0>; + clocks = <&cmu CLK_SMMUGSCALER0>, <&cmu CLK_GSCALER0>; + clock-names = "sysmmu", "master"; + samsung,power-domain = <&pd_cam>; + }; + + smmu_gsc1: sysmmu@11a30000 { + compatible = "samsung,exynos4210-sysmmu"; + reg = <0x11a30000 0x1000>; + interrupts = <0 153 0>, <0 158 0>; + clocks = <&cmu CLK_SMMUGSCALER1>, <&cmu CLK_GSCALER1>; + clock-names = "sysmmu", "master"; + samsung,power-domain = <&pd_cam>; + }; + mshc_0: mshc@12510000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12510000 0x1000>; @@ -697,4 +735,5 @@ }; }; + #include "exynos3250-pinctrl.dtsi" |