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| author | Ben Dooks <ben-linux@fluff.org> | 2008-01-28 13:01:17 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-28 13:20:50 +0000 |
| commit | 57c1b0f8dbfffaa00a242b171429e56489caef15 (patch) | |
| tree | e3e0a1c1002cf216c459aa54f546b20ced5d826f /arch | |
| parent | f7275dac55008f8296cfb89a01b1e71918ac7995 (diff) | |
| download | linux-3.10-57c1b0f8dbfffaa00a242b171429e56489caef15.tar.gz linux-3.10-57c1b0f8dbfffaa00a242b171429e56489caef15.tar.bz2 linux-3.10-57c1b0f8dbfffaa00a242b171429e56489caef15.zip | |
[ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
Add checks for clk_set_rate() and ensure that we do not allow set_rate
to be called for a clock that does not have it defined. Add default
methods for fclk, hclk, pclk and mpll.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/plat-s3c24xx/clock.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 79cda0faec8..99a44746f8f 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -172,6 +172,15 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (IS_ERR(clk)) return -EINVAL; + /* We do not default just do a clk->rate = rate as + * the clock may have been made this way by choice. + */ + + WARN_ON(clk->set_rate == NULL); + + if (clk->set_rate == NULL) + return -EINVAL; + mutex_lock(&clocks_mutex); ret = (clk->set_rate)(clk, rate); mutex_unlock(&clocks_mutex); @@ -213,6 +222,12 @@ EXPORT_SYMBOL(clk_set_parent); /* base clocks */ +static int clk_default_setrate(struct clk *clk, unsigned long rate) +{ + clk->rate = rate; + return 0; +} + struct clk clk_xtal = { .name = "xtal", .id = -1, @@ -224,6 +239,7 @@ struct clk clk_xtal = { struct clk clk_mpll = { .name = "mpll", .id = -1, + .set_rate = clk_default_setrate, }; struct clk clk_upll = { @@ -239,6 +255,7 @@ struct clk clk_f = { .rate = 0, .parent = &clk_mpll, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_h = { @@ -247,6 +264,7 @@ struct clk clk_h = { .rate = 0, .parent = NULL, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_p = { @@ -255,6 +273,7 @@ struct clk clk_p = { .rate = 0, .parent = NULL, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_usb_bus = { |