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| author | Beata Michalska <b.michalska@samsung.com> | 2014-11-05 15:58:31 +0100 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2014-11-27 03:42:03 -0800 |
| commit | 9cff26ea83556e8e899dc7844ec662c30e203d7d (patch) | |
| tree | 30bbd219be400c99ab0f502f147fc986a8de6dca /arch | |
| parent | 6e00228239f29b965b72b0de228a2e576d45df6a (diff) | |
| download | linux-3.10-9cff26ea83556e8e899dc7844ec662c30e203d7d.tar.gz linux-3.10-9cff26ea83556e8e899dc7844ec662c30e203d7d.tar.bz2 linux-3.10-9cff26ea83556e8e899dc7844ec662c30e203d7d.zip | |
ARM: dts: exynos3250-rinato: support for FIMC-IS
Signed-off-by: Beata Michalska <b.michalska@samsung.com>
Change-Id: Idf7390055df5c6760986daa59e46d0fc9bb32812
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250-rinato.dts | 76 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 32 |
2 files changed, 73 insertions, 35 deletions
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index c8bbe87cdcf..67c9cdb89d1 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -31,20 +31,24 @@ 0x48000000 0x08000000 0x50000000 0x08000000 0x58000000 0x07F00000>; - }; - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + contig_mem: region@51000000 { + compatible = "linux,contiguous-memory-region"; + reg = <0x51000000 0x1000000>; + linux,default-contiguous-region; + }; - contig_mem: region@51000000 { - compatible = "linux,contiguous-memory-region"; - reg = <0x51000000 0x1000000>; - linux,default-contiguous-region; + fimc_is_mem: region@58000000 { + compatible = "linux,contiguous-memory-region", + "reserved-memory-region"; + reg = <0x58000000 0x4000000>; + }; }; }; - chosen { bootargs = "console=ttySAC1,115200N8 root=/dev/mmcblk0p15 rootwait earlyprintk panic=5"; }; @@ -381,6 +385,58 @@ }; }; +&fimc_is { + pinctrl-names = "default"; + pinctrl-0 = <&cam_port_b_clk_active>; + status = "okay"; + memory-region = <&fimc_is_mem>; +}; + +&fimc_lite_0 { + status = "okay"; +}; + +&csis_0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + /* Only one voltage is used on Exynos3250 */ + vddcore-supply = <&ldo6_reg>; + vddio-supply = <&ldo6_reg>; + port@3 { + reg = <3>; + csis0_ep: endpoint { + remote-endpoint = <&s5k8b1_ep>; + data-lanes = <1 2>; + samsung,csis-hs-settle = <18>; + samsung,csis-wclk; + }; + }; +}; + +&i2c0_isp { + pinctrl-0 = <&fimc_is_i2c0>; + pinctrl-names = "default"; + + s5k8b1@6a { + compatible = "samsung,s5k8b1"; + reg = <0x6a>; + vdda-supply = <&ldo13_reg>; + vddio-supply = <&ldo21_reg>; + vddd-supply = <&ldo22_reg>; + xshutdown-gpios = <&gpm2 3 0>; + clocks = <&cmu CLK_SCLK_CAM1>; /* CAM_B_CLKOUT */ + clock-names = "extclk"; + clock-frequency = <24000000>; + port { + s5k8b1_ep: endpoint { + remote-endpoint = <&csis0_ep>; + data-lanes = <2>; + }; + }; + }; +}; + &gpu { vdd_g3d-supply = <&buck3_reg>; status = "okay"; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index cabc03140e6..3b25aac9a51 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -225,21 +225,13 @@ reg = <0x12180000 0x10000>; /* MCUCTL */ interrupts = <0 196 0>, <0 197 0>; clocks = <&cmu_isp CLK_ISP>, - <&cmu_isp CLK_DRC>, - <&cmu_isp CLK_FD>, - <&cmu_isp CLK_SCALERC>, - <&cmu_isp CLK_PPMUISPMX>, - <&cmu_isp CLK_PPMUISPX>, - <&cmu_isp CLK_MPWM_ISP>, <&cmu_isp CLK_MCUISP>, - <&cmu_isp CLK_DIV_MPWM>, <&cmu_isp CLK_DIV_ISP0>, - <&cmu_isp CLK_DIV_ISP1>, <&cmu_isp CLK_DIV_MCUISP0>, + <&cmu_isp CLK_DIV_MPWM>, + <&cmu_isp CLK_DIV_ISP0>, + <&cmu_isp CLK_DIV_ISP1>, + <&cmu_isp CLK_DIV_MCUISP0>, <&cmu_isp CLK_DIV_MCUISP1>, <&cmu CLK_CAM1>, - <&cmu_isp CLK_SPI1_ISP>, - <&cmu_isp CLK_SPI0_ISP>, - <&cmu_isp CLK_UART_ISP>, - <&cmu CLK_ASYNCAXIM>, <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>, <&cmu CLK_DIV_ACLK_400_MCUISP>, <&cmu CLK_MOUT_ACLK_400_MCUISP>, @@ -250,21 +242,11 @@ <&cmu CLK_DIV_MPLL_PRE>, <&cmu CLK_FIN_PLL>; clock-names = "isp", - "drc", - "fd", - "scalerc", - "ppmuispmx", - "ppmuispx", - "mpwm_isp", "mcu_isp", - "isp_divmpwm", "isp_div0", - "isp_div1", "mcu_isp_div0", - "mcu_isp_div1", + "isp_divmpwm", + "isp_div0", "isp_div1", + "mcu_isp_div0", "mcu_isp_div1", "cam1", - "spi1_isp", - "spi0_isp", - "uart_isp", - "asyncaxim", "mout_aclk400_mcuisp_sub", "div_aclk400_mcuisp", "mout_aclk400_mcuisp", |