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authorTomasz Figa <t.figa@samsung.com>2013-06-26 19:04:13 +0200
committerChanho Park <chanho61.park@samsung.com>2014-11-18 11:43:23 +0900
commitaa75091c073173c5b3eadd7fcae80af8556e0b68 (patch)
tree7a5c0a653fbc10e975899e2d7e68dfe1fc457ac6 /arch
parentac996586d118fcd58977cf3dadbd36165ecfd94d (diff)
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ARM: EXYNOS: pm: Move call to flush_cache_all() before outer_flush_all()
Flushing L1 cache might cause data to be stored to L2 cache, so it is more reasonable to flush L1 cache first and only then L2 cache. This patch moves call to flush_cache_all() in exynos_cpu_suspend() before outer_flush_all() to make sure that all data are flushed correctly. In addition flushing is enabled for all Exynos SoCs to prevent any data loss. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/pm.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index e3faaa81201..83c49994fd1 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -82,13 +82,11 @@ static unsigned int save_arm_register[2];
static int exynos_cpu_suspend(unsigned long arg)
{
+ flush_cache_all();
#ifdef CONFIG_CACHE_L2X0
outer_flush_all();
#endif
- if (soc_is_exynos5250())
- flush_cache_all();
-
/* issue the standby signal into the pm unit. */
cpu_do_idle();