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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2009-06-10 21:02:22 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-11 02:39:02 +0200
commitdf1a132bf3d3508f863336c80a27806a2ac947e0 (patch)
tree2aa26b9c5d0528e816a80bd3b58c9b2442670d5c /arch/x86
parentea1900e571d40a3ce60c835c2f21e1fd8c5cb663 (diff)
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perf_counter: Introduce struct for sample data
For easy extension of the sample data, put it in a structure. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/perf_counter.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 240ca563063..82a23d487f9 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -1173,11 +1173,14 @@ static void intel_pmu_reset(void)
*/
static int intel_pmu_handle_irq(struct pt_regs *regs)
{
+ struct perf_sample_data data;
struct cpu_hw_counters *cpuc;
- struct cpu_hw_counters;
int bit, cpu, loops;
u64 ack, status;
+ data.regs = regs;
+ data.addr = 0;
+
cpu = smp_processor_id();
cpuc = &per_cpu(cpu_hw_counters, cpu);
@@ -1210,7 +1213,7 @@ again:
if (!intel_pmu_save_and_restart(counter))
continue;
- if (perf_counter_overflow(counter, 1, regs, 0))
+ if (perf_counter_overflow(counter, 1, &data))
intel_pmu_disable_counter(&counter->hw, bit);
}
@@ -1230,12 +1233,16 @@ again:
static int amd_pmu_handle_irq(struct pt_regs *regs)
{
- int cpu, idx, handled = 0;
+ struct perf_sample_data data;
struct cpu_hw_counters *cpuc;
struct perf_counter *counter;
struct hw_perf_counter *hwc;
+ int cpu, idx, handled = 0;
u64 val;
+ data.regs = regs;
+ data.addr = 0;
+
cpu = smp_processor_id();
cpuc = &per_cpu(cpu_hw_counters, cpu);
@@ -1256,7 +1263,7 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)
if (!x86_perf_counter_set_period(counter, hwc, idx))
continue;
- if (perf_counter_overflow(counter, 1, regs, 0))
+ if (perf_counter_overflow(counter, 1, &data))
amd_pmu_disable_counter(hwc, idx);
}