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| author | Bjorn Helgaas <bhelgaas@google.com> | 2013-05-20 10:20:21 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-05-20 10:20:21 -0600 |
| commit | f3f011750a18abc389ef1b0d504fbeeacf641919 (patch) | |
| tree | f20f5d4be7678c9606db1fdb5871ae2e534d5106 /arch/x86 | |
| parent | 3f327e39b4b8f760c331bb2836735be6d83fbf53 (diff) | |
| download | linux-3.10-f3f011750a18abc389ef1b0d504fbeeacf641919.tar.gz linux-3.10-f3f011750a18abc389ef1b0d504fbeeacf641919.tar.bz2 linux-3.10-f3f011750a18abc389ef1b0d504fbeeacf641919.zip | |
Revert "x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0"
This reverts commit dd72be99d11dbf738d910a38479ce414a51eb21e.
Andy Shevchenko <andy.shevchenko@gmail.com> reported that this commit
broke Intel Medfield devices.
Reference: https://lkml.kernel.org/r/CAHp75Vdf6gFZChS47=grUygHBDWcoOWDYPzw+Zj5bdVCWj85Jw@mail.gmail.com
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/pci/mrst.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c index 0e0fabf1734..6eb18c42a28 100644 --- a/arch/x86/pci/mrst.c +++ b/arch/x86/pci/mrst.c @@ -141,11 +141,6 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, */ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) { - if (bus == 0 && (devfn == PCI_DEVFN(2, 0) - || devfn == PCI_DEVFN(0, 0) - || devfn == PCI_DEVFN(3, 0))) - return 1; - /* This is a workaround for A0 LNC bug where PCI status register does * not have new CAP bit set. can not be written by SW either. * @@ -155,7 +150,10 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) */ if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE) return 0; - + if (bus == 0 && (devfn == PCI_DEVFN(2, 0) + || devfn == PCI_DEVFN(0, 0) + || devfn == PCI_DEVFN(3, 0))) + return 1; return 0; /* langwell on others */ } |