path: root/arch/x86/kernel/cpu/mcheck/mce.c
diff options
authorLinus Torvalds <>2012-10-19 14:15:16 -0700
committerLinus Torvalds <>2012-10-19 14:15:16 -0700
commit3b641bf453497d76ea28c5fc1c666f424ead6dcf (patch)
tree84dcc02681b3327afcec98481819935606ec5da3 /arch/x86/kernel/cpu/mcheck/mce.c
parent4a1f2b0fba89cdb3b2b1be99a7411bfd24d61be5 (diff)
parent4533d86270d7986e00594495dde9a109d6be27ae (diff)
Merge branch 'x86/urgent' of git://
Pull miscellaneous x86 fixes from Peter Anvin: "The biggest ones are fixing suspend/resume breakage on 32 bits, and an interrim fix for mapping over holes that allows AMD kit with more than 1 TB. A final solution for the latter is in the works, but involves some fairly invasive changes that will probably mean it will only be appropriate for 3.8." * 'x86/urgent' of git:// x86, MCE: Remove bios_cmci_threshold sysfs attribute x86, amd, mce: Avoid NULL pointer reference on CPU northbridge lookup x86: Exclude E820_RESERVED regions and memory holes above 4 GB from direct mapping. x86/cache_info: Use ARRAY_SIZE() in amd_l3_attrs() x86/reboot: Remove quirk entry for SBC FITPC x86, suspend: Correct the restore of CR4, EFER; skip computing EFLAGS.ID
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce.c')
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 29e87d3b284..46cbf868969 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -2209,11 +2209,6 @@ static struct dev_ext_attribute dev_attr_cmci_disabled = {
-static struct dev_ext_attribute dev_attr_bios_cmci_threshold = {
- __ATTR(bios_cmci_threshold, 0444, device_show_int, NULL),
- &mce_bios_cmci_threshold
static struct device_attribute *mce_device_attrs[] = {
@@ -2222,7 +2217,6 @@ static struct device_attribute *mce_device_attrs[] = {
- &dev_attr_bios_cmci_threshold.attr,