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| author | David S. Miller <davem@davemloft.net> | 2012-05-25 00:31:56 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-05-25 00:31:56 -0700 |
| commit | 456d3d42460c1fc20ba0d27442443fcd63aaac35 (patch) | |
| tree | 2bdd7021420f845f3c775e91ccc91aa791ef6c45 /arch/sparc/math-emu | |
| parent | 07acfc2a9349a8ce45b236c2624dad452001966b (diff) | |
| download | linux-3.10-456d3d42460c1fc20ba0d27442443fcd63aaac35.tar.gz linux-3.10-456d3d42460c1fc20ba0d27442443fcd63aaac35.tar.bz2 linux-3.10-456d3d42460c1fc20ba0d27442443fcd63aaac35.zip | |
sparc64: Fix several bugs in quad floating point emulation.
UltraSPARC-T2 and later do not use the fp_exception_other trap and do
not set the floating point trap type field in the %fsr at all when you
try to execute an unimplemented FPU operation.
Instead, it uses the illegal_instruction trap and it leaves the
floating point trap type field clear.
So we should not validate the %fsr trap type field when do_mathemu()
is invoked from the illegal instruction handler.
Also, the floating point trap type field is 3 bits, not 4 bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/math-emu')
| -rw-r--r-- | arch/sparc/math-emu/math_64.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c index 2bbe2f28ad2..1704068da92 100644 --- a/arch/sparc/math-emu/math_64.c +++ b/arch/sparc/math-emu/math_64.c @@ -163,7 +163,7 @@ typedef union { u64 q[2]; } *argp; -int do_mathemu(struct pt_regs *regs, struct fpustate *f) +int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap) { unsigned long pc = regs->tpc; unsigned long tstate = regs->tstate; @@ -218,7 +218,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f) case FSQRTS: { unsigned long x = current_thread_info()->xfsr[0]; - x = (x >> 14) & 0xf; + x = (x >> 14) & 0x7; TYPE(x,1,1,1,1,0,0); break; } @@ -226,7 +226,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f) case FSQRTD: { unsigned long x = current_thread_info()->xfsr[0]; - x = (x >> 14) & 0xf; + x = (x >> 14) & 0x7; TYPE(x,2,1,2,1,0,0); break; } @@ -357,9 +357,17 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f) if (type) { argp rs1 = NULL, rs2 = NULL, rd = NULL; - freg = (current_thread_info()->xfsr[0] >> 14) & 0xf; - if (freg != (type >> 9)) - goto err; + /* Starting with UltraSPARC-T2, the cpu does not set the FP Trap + * Type field in the %fsr to unimplemented_FPop. Nor does it + * use the fp_exception_other trap. Instead it signals an + * illegal instruction and leaves the FP trap type field of + * the %fsr unchanged. + */ + if (!illegal_insn_trap) { + int ftt = (current_thread_info()->xfsr[0] >> 14) & 0x7; + if (ftt != (type >> 9)) + goto err; + } current_thread_info()->xfsr[0] &= ~0x1c000; freg = ((insn >> 14) & 0x1f); switch (type & 0x3) { |