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| author | Matt Fleming <matt@console-pimps.org> | 2010-03-26 11:37:16 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-03-26 11:37:16 +0900 |
| commit | 4539282dbc20fe612113c8f267d51a90d46a7f50 (patch) | |
| tree | 579f4785bd2e06339291df2c1d17c0b7be93df0c /arch/sh | |
| parent | 01e77706cdde7c0b47e5ca1f4284a795504c7c40 (diff) | |
| download | linux-3.10-4539282dbc20fe612113c8f267d51a90d46a7f50.tar.gz linux-3.10-4539282dbc20fe612113c8f267d51a90d46a7f50.tar.bz2 linux-3.10-4539282dbc20fe612113c8f267d51a90d46a7f50.zip | |
sh: update the TLB replacement counter for entry wiring.
Presently the TLB wiring code depends on MMUCR.URB for working out where
to place the wired entry, but fails to take the replacment counter in to
consideration. This fixes up the wiring logic and ensures that wired
entries remain so.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/mmu_context.h | 2 | ||||
| -rw-r--r-- | arch/sh/mm/tlb-urb.c | 22 |
2 files changed, 19 insertions, 5 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 310ec92f275..5963124c1d4 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -30,6 +30,8 @@ #define MMUCR_URB 0x00FC0000 #define MMUCR_URB_SHIFT 18 #define MMUCR_URB_NENTRIES 64 +#define MMUCR_URC 0x0000FC00 +#define MMUCR_URC_SHIFT 10 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) #define MMUCR_SE (1 << 4) diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c index bb5b9098956..c92ce20db39 100644 --- a/arch/sh/mm/tlb-urb.c +++ b/arch/sh/mm/tlb-urb.c @@ -24,13 +24,9 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte) local_irq_save(flags); - /* Load the entry into the TLB */ - __update_tlb(vma, addr, pte); - - /* ... and wire it up. */ status = __raw_readl(MMUCR); urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT; - status &= ~MMUCR_URB; + status &= ~MMUCR_URC; /* * Make sure we're not trying to wire the last TLB entry slot. @@ -39,7 +35,23 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte) urb = urb % MMUCR_URB_NENTRIES; + /* + * Insert this entry into the highest non-wired TLB slot (via + * the URC field). + */ + status |= (urb << MMUCR_URC_SHIFT); + __raw_writel(status, MMUCR); + ctrl_barrier(); + + /* Load the entry into the TLB */ + __update_tlb(vma, addr, pte); + + /* ... and wire it up. */ + status = __raw_readl(MMUCR); + + status &= ~MMUCR_URB; status |= (urb << MMUCR_URB_SHIFT); + __raw_writel(status, MMUCR); ctrl_barrier(); |