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| author | Paul Mundt <lethal@linux-sh.org> | 2007-03-29 00:04:39 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@hera.kernel.org> | 2007-05-07 02:11:55 +0000 |
| commit | cd6c7ea234dc8a8607283e056d8010b2bd3c6369 (patch) | |
| tree | abcf26a22e77ba00c219151997101b9678fba3fc /arch/sh/drivers | |
| parent | 0264f1603904dbee3196abc748a53fb0b23b8046 (diff) | |
| download | linux-3.10-cd6c7ea234dc8a8607283e056d8010b2bd3c6369.tar.gz linux-3.10-cd6c7ea234dc8a8607283e056d8010b2bd3c6369.tar.bz2 linux-3.10-cd6c7ea234dc8a8607283e056d8010b2bd3c6369.zip | |
sh: Add a dummy SH-4 PCIC fixup.
By default we don't have anything to fix up for the SH-4 PCIC, boards can
overload this as necessary.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
| -rw-r--r-- | arch/sh/drivers/pci/ops-sh4.c | 6 | ||||
| -rw-r--r-- | arch/sh/drivers/pci/pci-sh7751.c | 15 |
2 files changed, 12 insertions, 9 deletions
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c index 2d4371009a5..54232f13e40 100644 --- a/arch/sh/drivers/pci/ops-sh4.c +++ b/arch/sh/drivers/pci/ops-sh4.c @@ -162,3 +162,9 @@ char * __init pcibios_setup(char *str) return str; } + +int __attribute__((weak)) pci_fixup_pcic(void) +{ + /* Nothing to do. */ + return 0; +} diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index f3ead58a951..1aca7fe5783 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c @@ -12,7 +12,6 @@ * License. See linux/COPYING for more information. * */ - #undef DEBUG #include <linux/init.h> @@ -28,7 +27,7 @@ * Initialization. Try all known PCI access methods. Note that we support * using both PCI BIOS and direct access: in such cases, we use I/O ports * to access config space. - * + * * Note that the platform specific initialization (BSC registers, and memory * space mapping) will be called via the platform defined function * pcibios_init_platform(). @@ -115,7 +114,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) * Wait Cycle Control + Parity Enable + Bus Master + * Mem space enable */ - word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | + word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES; pci_write_reg(word, SH7751_PCICONF1); @@ -123,10 +122,10 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) word = PCI_BASE_CLASS_BRIDGE << 24; pci_write_reg(word, SH7751_PCICONF2); - /* Set IO and Mem windows to local address - * Make PCI and local address the same for easy 1 to 1 mapping + /* Set IO and Mem windows to local address + * Make PCI and local address the same for easy 1 to 1 mapping * Window0 = map->window0.size @ non-cached area base = SDRAM - * Window1 = map->window1.size @ cached area base = SDRAM + * Window1 = map->window1.size @ cached area base = SDRAM */ word = map->window0.size - 1; pci_write_reg(word, SH4_PCILSR0); @@ -175,7 +174,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break; case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break; } - + if (!word) return 0; @@ -194,9 +193,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) * DMA interrupts... */ -#if defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_LBOX_RE2) pci_fixup_pcic(); -#endif /* SH7751 init done, set central function init complete */ /* use round robin mode to stop a device starving/overruning */ |