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| author | Sylvain Munaut <tnt@246tNt.com> | 2006-03-26 13:38:09 +0200 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-03-27 14:49:00 +1100 |
| commit | 1f5e3b028c5b592b5a792a390c78d609219aebfd (patch) | |
| tree | f8aec1818e99f8ee485fdc686c73299bcbb6a18a /arch/ppc/syslib | |
| parent | f8dd311982c86141f4f2fd326c0edf0c2d9fd97b (diff) | |
| download | linux-3.10-1f5e3b028c5b592b5a792a390c78d609219aebfd.tar.gz linux-3.10-1f5e3b028c5b592b5a792a390c78d609219aebfd.tar.bz2 linux-3.10-1f5e3b028c5b592b5a792a390c78d609219aebfd.zip | |
[PATCH] ppc32: Reorganize and complete MPC52xx initial cpu setup
ppc32: Reorganize and complete MPC52xx initial cpu setup
This patch splits up the CPU setup into a generic part and a
platform specific part. We also add a few missing init at the
same time.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib')
| -rw-r--r-- | arch/ppc/syslib/mpc52xx_setup.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c index 2ee48ce0a51..ee6379bb415 100644 --- a/arch/ppc/syslib/mpc52xx_setup.c +++ b/arch/ppc/syslib/mpc52xx_setup.c @@ -24,6 +24,8 @@ #include <asm/pgtable.h> #include <asm/ppcboot.h> +#include <syslib/mpc52xx_pci.h> + extern bd_t __res; static int core_mult[] = { /* CPU Frequency multiplier, taken */ @@ -216,6 +218,52 @@ mpc52xx_calibrate_decr(void) tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000); } + +void __init +mpc52xx_setup_cpu(void) +{ + struct mpc52xx_cdm __iomem *cdm; + struct mpc52xx_xlb __iomem *xlb; + + /* Map zones */ + cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE); + xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE); + + if (!cdm || !xlb) { + printk(KERN_ERR __FILE__ ": " + "Error while mapping CDM/XLB during " + "mpc52xx_setup_cpu\n"); + goto unmap_regs; + } + + /* Use internal 48 Mhz */ + out_8(&cdm->ext_48mhz_en, 0x00); + out_8(&cdm->fd_enable, 0x01); + if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ + out_be16(&cdm->fd_counters, 0x0001); + else + out_be16(&cdm->fd_counters, 0x5555); + + /* Configure the XLB Arbiter priorities */ + out_be32(&xlb->master_pri_enable, 0xff); + out_be32(&xlb->master_priority, 0x11111111); + + /* Enable ram snooping for 1GB window */ + out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP); + out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d); + + /* Disable XLB pipelining */ + /* (cfr errate 292. We could do this only just before ATA PIO + transaction and re-enable it after ...) */ + out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); + + /* Unmap reg zone */ +unmap_regs: + if (cdm) iounmap(cdm); + if (xlb) iounmap(xlb); +} + + int mpc52xx_match_psc_function(int psc_idx, const char *func) { struct mpc52xx_psc_func *cf = mpc52xx_psc_functions; |