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author | James Bottomley <James.Bottomley@suse.de> | 2010-01-25 11:42:21 -0600 |
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committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2010-02-05 12:31:37 -0600 |
commit | ef7cc35b0ee03431731186320b18e5da585341ff (patch) | |
tree | 4cc97f7abec64134f1d8895644cc38c7e130ee13 /arch/parisc | |
parent | 9df5f74194871ebd0e51ef5ad2eca5084acaaaba (diff) | |
download | linux-3.10-ef7cc35b0ee03431731186320b18e5da585341ff.tar.gz linux-3.10-ef7cc35b0ee03431731186320b18e5da585341ff.tar.bz2 linux-3.10-ef7cc35b0ee03431731186320b18e5da585341ff.zip |
parisc: add mm API for DMA to vmalloc/vmap areas
We already have an API to flush a kernel page along an alias
address, so use it. The TLB purge prevents the CPU from doing
speculative moveins on the flushed address, so we don't need to
implement and invalidate.
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'arch/parisc')
-rw-r--r-- | arch/parisc/include/asm/cacheflush.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 7a73b615c23..477277739da 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -38,6 +38,18 @@ void flush_cache_mm(struct mm_struct *mm); #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); +/* vmap range flushes and invalidates. Architecturally, we don't need + * the invalidate, because the CPU should refuse to speculate once an + * area has been flushed, so invalidate is left empty */ +static inline void flush_kernel_vmap_range(void *vaddr, int size) +{ + unsigned long start = (unsigned long)vaddr; + + flush_kernel_dcache_range_asm(start, start + size); +} +static inline void invalidate_kernel_vmap_range(void *vaddr, int size) +{ +} #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() |