diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:40 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:40 +0100 |
| commit | 4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4 (patch) | |
| tree | e138eeb21887f6306bfee644bae4a88f68674f00 /arch/mips | |
| parent | f1d39e6ed7ad71048db3b2835dccf3a5a01fab69 (diff) | |
| download | linux-3.10-4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4.tar.gz linux-3.10-4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4.tar.bz2 linux-3.10-4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4.zip | |
MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 5070e960add..bc985b7af4d 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -544,7 +544,7 @@ static struct irq_chip octeon_irq_chip_ciu1 = { #ifdef CONFIG_PCI_MSI -static DEFINE_SPINLOCK(octeon_irq_msi_lock); +static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock); static void octeon_irq_msi_ack(unsigned int irq) { @@ -586,12 +586,12 @@ static void octeon_irq_msi_enable(unsigned int irq) */ uint64_t en; unsigned long flags; - spin_lock_irqsave(&octeon_irq_msi_lock, flags); + raw_spin_lock_irqsave(&octeon_irq_msi_lock, flags); en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); en |= 1ull << (irq - OCTEON_IRQ_MSI_BIT0); cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); - spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); + raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); } } @@ -608,12 +608,12 @@ static void octeon_irq_msi_disable(unsigned int irq) */ uint64_t en; unsigned long flags; - spin_lock_irqsave(&octeon_irq_msi_lock, flags); + raw_spin_lock_irqsave(&octeon_irq_msi_lock, flags); en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); en &= ~(1ull << (irq - OCTEON_IRQ_MSI_BIT0)); cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); - spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); + raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); } } |