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| author | David Daney <ddaney@caviumnetworks.com> | 2010-07-23 18:41:42 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:26:21 +0100 |
| commit | 5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf (patch) | |
| tree | e307c9bccdf7a5dfd32fd5157b0d8b5f617a8dfc /arch/mips | |
| parent | de6d5b555c1887b5b9b59854a45ebd4805fb4b39 (diff) | |
| download | linux-3.10-5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf.tar.gz linux-3.10-5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf.tar.bz2 linux-3.10-5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf.zip | |
MIPS: uasm: Add BBIT0 and BBIT1 instructions
These are OCTEON specific instructions.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/uasm.h | 4 | ||||
| -rw-r--r-- | arch/mips/mm/uasm.c | 22 |
2 files changed, 25 insertions, 1 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index 3964b2e6c7d..db9d449b51e 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h @@ -223,3 +223,7 @@ void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1, void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); +void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, + unsigned int bit, int lid); +void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, + unsigned int bit, int lid); diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index fe041d5bb41..636b817d390 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -68,7 +68,7 @@ enum opcode { insn_pref, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, - insn_dins, insn_syscall + insn_dins, insn_syscall, insn_bbit0, insn_bbit1 }; struct insn { @@ -143,6 +143,8 @@ static struct insn insn_table[] __cpuinitdata = { { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM}, + { insn_bbit0, M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM }, + { insn_bbit1, M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM }, { insn_invalid, 0, 0 } }; @@ -411,6 +413,8 @@ I_u3u1u2(_xor) I_u2u1u3(_xori) I_u2u1msbu3(_dins); I_u1(_syscall); +I_u1u2s3(_bbit0); +I_u1u2s3(_bbit1); /* Handle labels. */ void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) @@ -620,3 +624,19 @@ uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) uasm_r_mips_pc16(r, *p, lid); uasm_i_bgez(p, reg, 0); } + +void __cpuinit +uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, + unsigned int bit, int lid) +{ + uasm_r_mips_pc16(r, *p, lid); + uasm_i_bbit0(p, reg, bit, 0); +} + +void __cpuinit +uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, + unsigned int bit, int lid) +{ + uasm_r_mips_pc16(r, *p, lid); + uasm_i_bbit1(p, reg, bit, 0); +} |