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| author | David Daney <david.daney@cavium.com> | 2011-09-16 18:06:02 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-09-21 17:54:07 +0200 |
| commit | 0f4ccbc835036cbcc2513585bb2e93ee62e12674 (patch) | |
| tree | f70b98675abd1d6dbdd28c30863d9ea09e31d8db /arch/mips | |
| parent | d968275921f9fa7fbc602ac6618ffec6a062ee3c (diff) | |
| download | linux-3.10-0f4ccbc835036cbcc2513585bb2e93ee62e12674.tar.gz linux-3.10-0f4ccbc835036cbcc2513585bb2e93ee62e12674.tar.bz2 linux-3.10-0f4ccbc835036cbcc2513585bb2e93ee62e12674.zip | |
MIPS: No branches in delay slots for huge pages in handle_tlbl
For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch. This leads to undefined behavior.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 46f33c7c1a0..e06370f58ef 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -1962,7 +1962,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void) uasm_i_andi(&p, wr.r3, wr.r3, 2); uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2); } - + if (PM_DEFAULT_MASK == 0) + uasm_i_nop(&p); /* * We clobbered C0_PAGEMASK, restore it. On the other branch * it is restored in build_huge_tlb_write_entry. |