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author | Chris Dearman <chris@mips.com> | 2007-03-26 14:47:06 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-03-29 23:46:35 +0100 |
commit | cbde5ebc972c0577741a69c85d5e5afad19d813b (patch) | |
tree | 493a2f04b81bc20ba3e823b58d28b3031f2a08df /arch/mips | |
parent | eb541cb24078eae83b9ef0573af36347d8dc01ee (diff) | |
download | linux-3.10-cbde5ebc972c0577741a69c85d5e5afad19d813b.tar.gz linux-3.10-cbde5ebc972c0577741a69c85d5e5afad19d813b.tar.bz2 linux-3.10-cbde5ebc972c0577741a69c85d5e5afad19d813b.zip |
[MIPS] lockdep: Handle interrupts in R3000 style c0_status register.
Check the IEP bit for R3000 style processors when checking to see if
interrupts will be reenabled in restore_all.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/kernel/entry.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 0b78fcbf044..686249c5c32 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -121,7 +121,11 @@ FEXPORT(restore_partial) # restore partial frame SAVE_AT SAVE_TEMP LONG_L v0, PT_STATUS(sp) - and v0, 1 +#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) + and v0, ST0_IEP +#else + and v0, ST0_IE +#endif beqz v0, 1f jal trace_hardirqs_on b 2f |