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author | Thiemo Seufer <ths@networkno.de> | 2007-03-19 00:13:37 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-03-19 20:22:43 +0000 |
commit | 119537c092638bf8a0672415024639353c773bb1 (patch) | |
tree | af3fc85f2d5a4bf93fd1cd82b228054ac6b5fe42 /arch/mips/sni | |
parent | 72ede9b18967e7a8a62a88f164f003193f6d891f (diff) | |
download | linux-3.10-119537c092638bf8a0672415024639353c773bb1.tar.gz linux-3.10-119537c092638bf8a0672415024639353c773bb1.tar.bz2 linux-3.10-119537c092638bf8a0672415024639353c773bb1.zip |
[MIPS] Misc fixes for plat_irq_dispatch functions
o adds missing ST0_IM masks, which caused the logging of valid interrupts
as spurious
o stops pnx8550 to log every interrupt as spurious
o adds cause register masks for ip22/ip32, which caused handling of masked
interrupts
o removes some superfluous parentheses in the SNI interrupt code
Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni')
-rw-r--r-- | arch/mips/sni/pcimt.c | 2 | ||||
-rw-r--r-- | arch/mips/sni/pcit.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 39e5b4abc55..8e8593b64f6 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -333,7 +333,7 @@ static void pcimt_hwint3(void) static void sni_pcimt_hwint(void) { - u32 pending = (read_c0_cause() & read_c0_status()); + u32 pending = read_c0_cause() & read_c0_status(); if (pending & C_IRQ5) do_IRQ (MIPS_CPU_IRQ_BASE + 7); diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 8d6b3d5b13a..1dfc3f00bbd 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -271,7 +271,7 @@ static void pcit_hwint0(void) static void sni_pcit_hwint(void) { - u32 pending = (read_c0_cause() & read_c0_status()); + u32 pending = read_c0_cause() & read_c0_status(); if (pending & C_IRQ1) pcit_hwint1(); @@ -285,7 +285,7 @@ static void sni_pcit_hwint(void) static void sni_pcit_hwint_cplus(void) { - u32 pending = (read_c0_cause() & read_c0_status()); + u32 pending = read_c0_cause() & read_c0_status(); if (pending & C_IRQ0) pcit_hwint0(); |