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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/qemu | |
parent | 91a2fcc88634663e9e13dcdfad0e4a860e64aeee (diff) | |
download | linux-3.10-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.gz linux-3.10-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.bz2 linux-3.10-7bcf7717b6a047c272410d0cd00213185fe6b99d.zip |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/qemu')
-rw-r--r-- | arch/mips/qemu/q-irq.c | 4 | ||||
-rw-r--r-- | arch/mips/qemu/q-setup.c | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c index 89891e984b3..4681757460a 100644 --- a/arch/mips/qemu/q-irq.c +++ b/arch/mips/qemu/q-irq.c @@ -2,6 +2,7 @@ #include <linux/linkage.h> #include <asm/i8259.h> +#include <asm/irq_cpu.h> #include <asm/mipsregs.h> #include <asm/qemu.h> #include <asm/system.h> @@ -12,7 +13,7 @@ asmlinkage void plat_irq_dispatch(void) unsigned int pending = read_c0_status() & read_c0_cause(); if (pending & 0x8000) { - ll_timer_interrupt(Q_COUNT_COMPARE_IRQ); + do_IRQ(Q_COUNT_COMPARE_IRQ); return; } if (pending & 0x0400) { @@ -29,6 +30,7 @@ void __init arch_init_irq(void) { mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */ + mips_cpu_irq_init(); init_i8259_irqs(); set_c0_status(0x8400); } diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index 841394336f0..89a207650ce 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c @@ -17,7 +17,6 @@ void __init plat_timer_setup(struct irqaction *irq) outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ outb_p(LATCH & 0xff , 0x40); /* LSB */ outb(LATCH >> 8 , 0x40); /* MSB */ - setup_irq(0, irq); } void __init plat_mem_setup(void) |