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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-08-01 16:47:15 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-08-01 16:47:15 -0700 |
commit | 1a9b4993b70fb1884716902774dc9025b457760d (patch) | |
tree | 83a3fa7011878ab4b7bef6857d4b481038a1e67e /arch/mips/loongson1/common/clock.c | |
parent | 1871e845e564c4e17f561ec4e5e4bb6bb8578685 (diff) | |
parent | 95cf1468f712df516cc471adcd1c861df4e3d371 (diff) | |
download | linux-3.10-1a9b4993b70fb1884716902774dc9025b457760d.tar.gz linux-3.10-1a9b4993b70fb1884716902774dc9025b457760d.tar.bz2 linux-3.10-1a9b4993b70fb1884716902774dc9025b457760d.zip |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"The lion share of this pull request are fixes for clk-related breakage
caused by other changes during this merge window. For some platforms
the fix was as simple as selecting HAVE_CLK, for others like the
Loongson 2 significant restructuring was required.
The remainder are changes required to get the Lantiq code to work
again."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: Loongson 2: Sort out clock managment.
MIPS: Loongson 1: more clk support and add select HAVE_CLK
MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLK
MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLK
MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK
MIPS: Lantiq: Platform specific CLK fixup
MIPS: Lantiq: Add device_tree_init function
MIPS: Lantiq: Fix interface clock and PCI control register offset
Diffstat (limited to 'arch/mips/loongson1/common/clock.c')
-rw-r--r-- | arch/mips/loongson1/common/clock.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/mips/loongson1/common/clock.c b/arch/mips/loongson1/common/clock.c index 2d98fb03059..1bbbbec1208 100644 --- a/arch/mips/loongson1/common/clock.c +++ b/arch/mips/loongson1/common/clock.c @@ -38,12 +38,28 @@ struct clk *clk_get(struct device *dev, const char *name) } EXPORT_SYMBOL(clk_get); +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + unsigned long clk_get_rate(struct clk *clk) { return clk->rate; } EXPORT_SYMBOL(clk_get_rate); +void clk_put(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_put); + static void pll_clk_init(struct clk *clk) { u32 pll; |