diff options
| author | Michal Simek <monstr@monstr.eu> | 2010-03-24 10:09:17 +0100 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2010-04-01 08:38:24 +0200 |
| commit | 0691c97d74cbdfd49333ef01939ecaef158ebe1b (patch) | |
| tree | 39845301dc8a7ef1ea3c3078646a947b27508c27 /arch/microblaze | |
| parent | 9373dd6ab140f1e6f2e62a9f0bf473987a0b62dc (diff) | |
| download | linux-3.10-0691c97d74cbdfd49333ef01939ecaef158ebe1b.tar.gz linux-3.10-0691c97d74cbdfd49333ef01939ecaef158ebe1b.tar.bz2 linux-3.10-0691c97d74cbdfd49333ef01939ecaef158ebe1b.zip | |
microblaze: Use MICROBLAZE_TLB_SIZE in asm code
TLB size was hardcoded in asm code. This patch brings ability
to change TLB size only in one place. (mmu.h).
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
| -rw-r--r-- | arch/microblaze/kernel/head.S | 2 | ||||
| -rw-r--r-- | arch/microblaze/kernel/misc.S | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S index e397d5d5257..ba2c0333c6b 100644 --- a/arch/microblaze/kernel/head.S +++ b/arch/microblaze/kernel/head.S @@ -134,7 +134,7 @@ _copy_bram: * virtual to physical. */ nop - addik r3, r0, 63 /* Invalidate all TLB entries */ + addik r3, r0, MICROBLAZE_TLB_SIZE -1 /* Invalidate all TLB entries */ _invalidate: mts rtlbx, r3 mts rtlbhi, r0 /* flush: ensure V is clear */ diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S index 18681eed5ec..7cf86498326 100644 --- a/arch/microblaze/kernel/misc.S +++ b/arch/microblaze/kernel/misc.S @@ -29,7 +29,7 @@ .type _tlbia, @function .align 4; _tlbia: - addik r12, r0, 63 /* flush all entries (63 - 3) */ + addik r12, r0, MICROBLAZE_TLB_SIZE - 1 /* flush all entries (63 - 3) */ /* isync */ _tlbia_1: mts rtlbx, r12 @@ -75,7 +75,7 @@ early_console_reg_tlb_alloc: * Load a TLB entry for the UART, so that microblaze_progress() can use * the UARTs nice and early. We use a 4k real==virtual mapping. */ - ori r4, r0, 63 + ori r4, r0, MICROBLAZE_TLB_SIZE - 1 mts rtlbx, r4 /* TLB slot 2 */ or r4,r5,r0 |