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| author | Philippe De Muyter <phdm@macqel.be> | 2010-10-27 14:57:48 +0200 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-01-05 15:19:17 +1000 |
| commit | b3d75b09bf8998fd302ba339eebbc768a110741b (patch) | |
| tree | c3273077768dcab76056c4e971f92dff5b5e72ae /arch/m68k | |
| parent | 5291fa98565a2f4d27ec59380e8497eba2af948d (diff) | |
| download | linux-3.10-b3d75b09bf8998fd302ba339eebbc768a110741b.tar.gz linux-3.10-b3d75b09bf8998fd302ba339eebbc768a110741b.tar.bz2 linux-3.10-b3d75b09bf8998fd302ba339eebbc768a110741b.zip | |
m68knommu: Move __flush_cache_all definition for m54xx in m54xxacr.h
__flush_cache_all for m54xx is intrinsically related to the bit
definitions in m54xxacr.h. Move it there from cacheflush_no.h,
for easier maintenance.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
| -rw-r--r-- | arch/m68k/include/asm/cacheflush_no.h | 28 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m54xxacr.h | 31 |
2 files changed, 36 insertions, 23 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h index 7085bd51668..8fda331f8a8 100644 --- a/arch/m68k/include/asm/cacheflush_no.h +++ b/arch/m68k/include/asm/cacheflush_no.h @@ -5,6 +5,9 @@ * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com> */ #include <linux/mm.h> +#if defined(CONFIG_M5407) || defined(CONFIG_M548x) +#include <asm/m54xxacr.h> +#endif #define flush_cache_all() __flush_cache_all() #define flush_cache_mm(mm) do { } while (0) @@ -27,31 +30,9 @@ #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) +#ifndef __flush_cache_all static inline void __flush_cache_all(void) { -#if defined(CONFIG_M5407) || defined(CONFIG_M548x) - /* - * Use cpushl to push and invalidate all cache lines. - * Gas doesn't seem to know how to generate the ColdFire - * cpushl instruction... Oh well, bit stuff it for now. - */ - __asm__ __volatile__ ( - "nop\n\t" - "clrl %%d0\n\t" - "1:\n\t" - "movel %%d0,%%a0\n\t" - "2:\n\t" - ".word 0xf468\n\t" - "addl #0x10,%%a0\n\t" - "cmpl #0x00000800,%%a0\n\t" - "blt 2b\n\t" - "addql #1,%%d0\n\t" - "cmpil #4,%%d0\n\t" - "bne 1b\n\t" - "movel #0xb6088500,%%d0\n\t" - "movec %%d0,%%CACR\n\t" - : : : "d0", "a0" ); -#endif /* CONFIG_M5407 */ #if defined(CONFIG_M523x) || defined(CONFIG_M527x) __asm__ __volatile__ ( "movel #0x81400100, %%d0\n\t" @@ -88,5 +69,6 @@ static inline void __flush_cache_all(void) : : : "d0" ); #endif /* CONFIG_M532x */ } +#endif /* __flush_cache_all */ #endif /* _M68KNOMMU_CACHEFLUSH_H */ diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h index 424d4a677e4..da713d22dd0 100644 --- a/arch/m68k/include/asm/m54xxacr.h +++ b/arch/m68k/include/asm/m54xxacr.h @@ -40,4 +40,35 @@ #define ACR_CM 0x00000060 /* Cache mode mask */ #define ACR_WPROTECT 0x00000004 /* Write protect */ +#ifndef __ASSEMBLY__ + +static inline void __m54xx_flush_cache_all(void) +{ + /* + * Use cpushl to push and invalidate all cache lines. + * Gas doesn't seem to know how to generate the ColdFire + * cpushl instruction... Oh well, bit stuff it for now. + */ + __asm__ __volatile__ ( + "nop\n\t" + "clrl %%d0\n\t" + "1:\n\t" + "movel %%d0,%%a0\n\t" + "2:\n\t" + ".word 0xf468\n\t" + "addl #0x10,%%a0\n\t" + "cmpl #0x00000800,%%a0\n\t" + "blt 2b\n\t" + "addql #1,%%d0\n\t" + "cmpil #4,%%d0\n\t" + "bne 1b\n\t" + "movel #0xb6088500,%%d0\n\t" + "movec %%d0,%%CACR\n\t" + : : : "d0", "a0" ); +} + +#define __flush_cache_all() __m54xx_flush_cache_all() + +#endif /* __ASSEMBLY__ */ + #endif /* m54xxacr_h */ |