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| author | Andrew Bresticker <abrestic@chromium.org> | 2013-09-25 14:12:52 -0700 |
|---|---|---|
| committer | Hyungwon Hwang <human.hwang@samsung.com> | 2014-12-17 16:18:08 +0900 |
| commit | bff2f2fb62aa5be7203bd7747a21b3fd6f7a6610 (patch) | |
| tree | 4598c4389917bd878c2123e420b6fef00c03bca2 /arch/arm | |
| parent | ca7ec536f091fd148945f8eebf045f2a0e4d01b4 (diff) | |
| download | linux-3.10-bff2f2fb62aa5be7203bd7747a21b3fd6f7a6610.tar.gz linux-3.10-bff2f2fb62aa5be7203bd7747a21b3fd6f7a6610.tar.bz2 linux-3.10-bff2f2fb62aa5be7203bd7747a21b3fd6f7a6610.zip | |
ARM: dts: exynos5420: add input clocks to audss clock controller
Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 11dd202c54b..8db792b26f7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -119,8 +119,8 @@ compatible = "samsung,exynos5420-audss-clock"; reg = <0x03810000 0x0C>; #clock-cells = <1>; - clocks = <&clock 148>; - clock-names = "sclk_audio"; + clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; }; codec@11000000 { |