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author | Dave Martin <dave.martin@linaro.org> | 2012-10-16 11:54:00 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-18 11:03:34 +0100 |
commit | 153cd8e839b5729358d4e5c3371e7509ee5ac96a (patch) | |
tree | 627a7dae9d293350f7147b111e657929d75926bd /arch/arm/mm | |
parent | ddffeb8c4d0331609ef2581d84de4d763607bd37 (diff) | |
download | linux-3.10-153cd8e839b5729358d4e5c3371e7509ee5ac96a.tar.gz linux-3.10-153cd8e839b5729358d4e5c3371e7509ee5ac96a.tar.bz2 linux-3.10-153cd8e839b5729358d4e5c3371e7509ee5ac96a.zip |
ARM: 7553/1: proc-v7: Ensure correct instruction set after cpu_reset
Because mov pc,<Rn> never switches instruction set when executed in
Thumb code, Thumb-2 kernels will silently execute the target code
after cpu_reset as Thumb code, even if the passed code pointer
denotes ARM (bit 0 clear).
This patch uses bx instead, ensuring the correct instruction set
for the target code.
Thumb code in the kernel is not supported prior to ARMv7, so other
CPUs are not affected.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 846d279f317..42cc833aa02 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -57,7 +57,7 @@ ENTRY(cpu_v7_reset) THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions) mcr p15, 0, r1, c1, c0, 0 @ disable MMU isb - mov pc, r0 + bx r0 ENDPROC(cpu_v7_reset) .popsection |