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authorKukjin Kim <kgene.kim@samsung.com>2010-10-01 19:37:09 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-23 11:50:15 +0900
commit7008147256eebdc30329bec95ebdf99a96684f79 (patch)
tree25ebf455fa45dbe76d00e2b1bc622eb1cd9bbded /arch/arm/mach-s5p6442
parentdab30d7f80d7a81ac736c590a81249d2fd323c62 (diff)
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ARM: S5P6442: Change to using s3c_gpio_cfgall_range()
Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p6442')
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
index 547c570f689..cce8c247070 100644
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -38,10 +38,9 @@ static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
switch (pdev->id) {
case 0:
s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin_range(S5P6442_GPB(2), 2, S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(S5P6442_GPB(2), 2,
+ S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
break;
default: