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author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2007-10-16 01:29:06 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 09:43:18 -0700 |
commit | 69816699fa019145dd163949d65a07093af73b67 (patch) | |
tree | 62f882257742edc6edda05349cf75789fb6fabe9 /arch/arm/mach-s3c2440 | |
parent | 9fa7bc016a688630386378c205f9ee0f7b2cc834 (diff) | |
download | linux-3.10-69816699fa019145dd163949d65a07093af73b67.tar.gz linux-3.10-69816699fa019145dd163949d65a07093af73b67.tar.bz2 linux-3.10-69816699fa019145dd163949d65a07093af73b67.zip |
s3c2410fb: adds pixclock to s3c2410fb_display
This patch adds pixelclock field to the s3c2410fb_display structure and make
use of it in the driver.
The Bast machine defined 9 modes but pixclock and margin values are defined
only for the 640x480 modes so I removed other modes.
This patch also fixes wrong display type constant for the SMDK2440 board.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/mach-s3c2440')
-rw-r--r-- | arch/arm/mach-s3c2440/mach-rx3715.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-s3c2440/mach-smdk2440.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index f26adeaf1e7..408337f8beb 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -123,6 +123,7 @@ static struct s3c2410fb_display rx3715_lcdcfg __initdata = { .width = 240, .height = 320, + .pixclock = 260000, .xres = 240, .yres = 320, .bpp = 16, diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 840a480c40d..561e39147e6 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -115,11 +115,12 @@ static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = { S3C2410_LCDCON5_PWREN | S3C2410_LCDCON5_HWSWP, - .type = S3C2410_LCDCON1_TFT16BPP, + .type = S3C2410_LCDCON1_TFT, .width = 240, .height = 320, + .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */ .xres = 240, .yres = 320, .bpp = 16, |