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| author | Kevin Wells <wellsk40@gmail.com> | 2010-09-16 06:18:50 -0700 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2010-10-12 21:37:37 -0600 |
| commit | bde435a9ca376d0b7809768ca803dbf14416b9c1 (patch) | |
| tree | dd9678beb7c219922ad9b94db0e8f0a804ae2ab4 /arch/arm/mach-lpc32xx | |
| parent | fadcf49b9bd7ec5fb69befbf477e747d5b6a0328 (diff) | |
| download | linux-3.10-bde435a9ca376d0b7809768ca803dbf14416b9c1.tar.gz linux-3.10-bde435a9ca376d0b7809768ca803dbf14416b9c1.tar.bz2 linux-3.10-bde435a9ca376d0b7809768ca803dbf14416b9c1.zip | |
spi/pl022: Add spi->mode support to AMBA SPI driver
This patch adds spi->mode support for the AMBA pl022 driver and
allows spidev to correctly alter SPI modes. Unused fields used in
the pl022 header file for the pl022_config_chip have been removed.
The ab8500 client driver selects the data transfer size instead
of the platform data.
For platforms that use the amba pl022 driver, the unused fields
in the controller data structure have been removed and the .mode
field in the SPI board info structure is used instead.
Signed-off-by: Kevin Wells <wellsk40@gmail.com>
Tested-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/mach-lpc32xx')
| -rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bc9a42da214..0c936cf5675 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control) } static struct pl022_config_chip spi0_chip_info = { - .lbm = LOOPBACK_DISABLED, .com_mode = INTERRUPT_TRANSFER, .iface = SSP_INTERFACE_MOTOROLA_SPI, .hierarchy = SSP_MASTER, .slave_tx_disable = 0, - .endian_tx = SSP_TX_LSB, - .endian_rx = SSP_RX_LSB, - .data_size = SSP_DATA_BITS_8, .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, - .clk_phase = SSP_CLK_FIRST_EDGE, - .clk_pol = SSP_CLK_POL_IDLE_LOW, .ctrl_len = SSP_BITS_8, .wait_state = SSP_MWIRE_WAIT_ZERO, .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, @@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void) .max_speed_hz = 5000000, .bus_num = 0, .chip_select = 0, + .mode = SPI_MODE_0, .platform_data = &eeprom, .controller_data = &spi0_chip_info, }, |