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authorJonathan Kliegman <kliegs@chromium.org>2013-04-04 15:15:49 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-04-04 15:15:49 +0900
commit8521420375d0e6824a76fda24677f428c1d3f598 (patch)
tree1ce1255ab11a645c84a3d1e076750c835de6b729 /arch/arm/mach-exynos/include/mach
parent672b6829e7290cb4e51987fdcb1078f4eee6546c (diff)
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ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend
Setting this bit to 0 causes the system to wait until suspended to use the wakeup masks. With it being set high previously, masked interrupts were being received and processed before the EINT_WAKEUP_MASK was configured. Signed-off-by: Jonathan Kliegman <kliegs@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach')
-rw-r--r--arch/arm/mach-exynos/include/mach/pm-core.h7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h
index 9d8da51e35c..7dbbfec13ea 100644
--- a/arch/arm/mach-exynos/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos/include/mach/pm-core.h
@@ -27,13 +27,8 @@ static inline void s3c_pm_debug_init_uart(void)
static inline void s3c_pm_arch_prepare_irqs(void)
{
- unsigned int tmp;
- tmp = __raw_readl(S5P_WAKEUP_MASK);
- tmp &= ~(1 << 31);
- __raw_writel(tmp, S5P_WAKEUP_MASK);
-
- __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);
__raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);
+ __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
}
static inline void s3c_pm_arch_stop_clocks(void)