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authorLukasz Majewski <l.majewski@samsung.com>2014-04-10 16:46:08 +0200
committerChanho Park <chanho61.park@samsung.com>2014-11-18 11:47:28 +0900
commit619b370f569ba6d3d05c175c1fe0dbc311f1d74b (patch)
treeb0f6d43fb86806f23e4b4f8239ff4fec4f878175 /arch/arm/mach-exynos/include/mach
parentfd3a1558a2ae3f3636c25cbb22ae35138594e54e (diff)
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cpuidle:clk:Exynos4412: Enable support for clock down when WFI cpuidle state is entered
This patch adds support for setting ARM cores' clock frequency down when entering WFI/WFE based cpuidle state. On the Trats2 device: performance governor, 1.4 GHz frequency, no extra load, 4 cores enabled: Without core clock down feature: 395 mA With core clock down feature: 337 mA Power consumption reduction around 15% Change-Id: I7bae29b0332a97c7b18ffb79f4b0a5ff3d70b7ce Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach')
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index d36ad76ad6a..0cf9ad0af65 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -138,6 +138,9 @@
#define EXYNOS4_CLKGATE_IP_ISP0 EXYNOS_CLKREG(0x18800)
#define EXYNOS4_CLKGATE_IP_ISP1 EXYNOS_CLKREG(0x18804)
+#define EXYNOS4_PWR_CTRL1 EXYNOS_CLKREG(0x15020)
+#define EXYNOS4_PWR_CTRL2 EXYNOS_CLKREG(0x15024)
+
#define EXYNOS4_APLL_LOCKTIME (0x1C20) /* 300us */
#define EXYNOS4_APLLCON0_ENABLE_SHIFT (31)
@@ -351,8 +354,12 @@
#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
+#define PWR_CTRL1_USE_CORE3_WFE (1 << 7)
+#define PWR_CTRL1_USE_CORE2_WFE (1 << 6)
#define PWR_CTRL1_USE_CORE1_WFE (1 << 5)
#define PWR_CTRL1_USE_CORE0_WFE (1 << 4)
+#define PWR_CTRL1_USE_CORE3_WFI (1 << 3)
+#define PWR_CTRL1_USE_CORE2_WFI (1 << 2)
#define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
#define PWR_CTRL1_USE_CORE0_WFI (1 << 0)