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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-28 12:24:40 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-28 12:24:40 -0700 |
commit | 4bb2d1009f671815870e8f78e826e4f9071392a7 (patch) | |
tree | 4b9f4e3b349a67d47b11eff7fcebbf57a3c40a1e /arch/arm/mach-exynos/dev-uart.c | |
parent | ff877c498eb2f9c4ea386270642e383bc867f63c (diff) | |
parent | 83fe628e16d84efc8df2731bc403eae4e4f53801 (diff) | |
download | linux-3.10-4bb2d1009f671815870e8f78e826e4f9071392a7.tar.gz linux-3.10-4bb2d1009f671815870e8f78e826e4f9071392a7.tar.bz2 linux-3.10-4bb2d1009f671815870e8f78e826e4f9071392a7.zip |
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: More SoC support updates" from Olof Johansson:
"This branch contains a handful of updates of SoC base code that had
dependencies on other external trees that have now been merged:
* Support for the new EXYNOS5250 SoC from Samsung
* SMP and power domain support for Tegra3 from NVIDIA
* ux500 updates for exporting SoC information through sysfs"
Fix up trivial merge conflicts as per Olof.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (30 commits)
ARM: mach-shmobile: ap4evb: Reserve DMA memory for the frame buffer
ARM: EXYNOS: Fix compilation error with mach-exynos4-dt board
ARM: dts: add initial dts file for EXYNOS5250, SMDK5250
ARM: EXYNOS: add support device tree enabled board file for EXYNOS5
ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs
ARM: EXYNOS: add support get_core_count() for EXYNOS5250
ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5
ARM: EXYNOS: add interrupt definitions for EXYNOS5250
ARM: EXYNOS: add support for EXYNOS5250 SoC
ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5
ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5
ARM: EXYNOS: add clock part for EXYNOS5250 SoC
ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts()
ARM: EXYNOS: to declare static for mach-exynos/common.c
ARM: EXYNOS: Add clkdev lookup entry for lcd clock
ARM: dt: Explicitly configure all serial ports on Tegra Cardhu
ARM: tegra: support for secondary cores on Tegra30
ARM: tegra: support for Tegra30 CPU powerdomains
ARM: tegra: add support for Tegra30 powerdomains
ARM: tegra: export tegra_powergate_is_powered()
...
Diffstat (limited to 'arch/arm/mach-exynos/dev-uart.c')
-rw-r--r-- | arch/arm/mach-exynos/dev-uart.c | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c new file mode 100644 index 00000000000..2e85c022fd1 --- /dev/null +++ b/arch/arm/mach-exynos/dev-uart.c @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Base EXYNOS UART resource and device definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/ioport.h> +#include <linux/platform_device.h> + +#include <asm/mach/arch.h> +#include <asm/mach/irq.h> +#include <mach/hardware.h> +#include <mach/map.h> + +#include <plat/devs.h> + +#define EXYNOS_UART_RESOURCE(_series, _nr) \ +static struct resource exynos##_series##_uart##_nr##_resource[] = { \ + [0] = DEFINE_RES_MEM(EXYNOS##_series##_PA_UART##_nr, EXYNOS##_series##_SZ_UART), \ + [1] = DEFINE_RES_IRQ(EXYNOS##_series##_IRQ_UART##_nr), \ +}; + +EXYNOS_UART_RESOURCE(4, 0) +EXYNOS_UART_RESOURCE(4, 1) +EXYNOS_UART_RESOURCE(4, 2) +EXYNOS_UART_RESOURCE(4, 3) + +struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = { + [0] = { + .resources = exynos4_uart0_resource, + .nr_resources = ARRAY_SIZE(exynos4_uart0_resource), + }, + [1] = { + .resources = exynos4_uart1_resource, + .nr_resources = ARRAY_SIZE(exynos4_uart1_resource), + }, + [2] = { + .resources = exynos4_uart2_resource, + .nr_resources = ARRAY_SIZE(exynos4_uart2_resource), + }, + [3] = { + .resources = exynos4_uart3_resource, + .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), + }, +}; + +EXYNOS_UART_RESOURCE(5, 0) +EXYNOS_UART_RESOURCE(5, 1) +EXYNOS_UART_RESOURCE(5, 2) +EXYNOS_UART_RESOURCE(5, 3) + +struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = { + [0] = { + .resources = exynos5_uart0_resource, + .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), + }, + [1] = { + .resources = exynos5_uart1_resource, + .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), + }, + [2] = { + .resources = exynos5_uart2_resource, + .nr_resources = ARRAY_SIZE(exynos5_uart2_resource), + }, + [3] = { + .resources = exynos5_uart3_resource, + .nr_resources = ARRAY_SIZE(exynos5_uart3_resource), + }, +}; |