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| author | Olof Johansson <olof@lixom.net> | 2012-10-17 17:09:37 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-10-17 17:09:37 -0700 |
| commit | 327f81c4558dac2138a6339069988d3baa5a152d (patch) | |
| tree | a7f0a5e461c3299aacf7b04d4a8358e6e20ec189 /arch/arm/boot | |
| parent | b5beb20d03c89a1ea7cb208c445546f2c62225e4 (diff) | |
| parent | a458926e16a37ef41a4fbf45957cb9faaeb6a6ef (diff) | |
| download | linux-3.10-327f81c4558dac2138a6339069988d3baa5a152d.tar.gz linux-3.10-327f81c4558dac2138a6339069988d3baa5a152d.tar.bz2 linux-3.10-327f81c4558dac2138a6339069988d3baa5a152d.zip | |
Merge tag 'mvebu_dove_late_fixes_for_v3.7' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper:
Misc. fixes for latest changes to mach-dove/
Fixes build breakage for mach-dove
* tag 'mvebu_dove_late_fixes_for_v3.7' of git://git.infradead.org/users/jcooper/linux:
ARM: dove: Add crypto engine to DT
ARM: dove: Remove watchdog from DT
ARM: dove: Restructure SoC device tree descriptor
ARM: dove: Fix clock names of sata and gbe
ARM: dove: Fix tauros2 device tree init
ARM: dove: Add pcie clock support
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/dove.dtsi | 49 |
1 files changed, 32 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 96fb824b5e6..5a00022383e 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -4,21 +4,32 @@ compatible = "marvell,dove"; model = "Marvell Armada 88AP510 SoC"; - interrupt-parent = <&intc>; - - intc: interrupt-controller { - compatible = "marvell,orion-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xf1020204 0x04>, - <0xf1020214 0x04>; - }; - - mbus@f1000000 { + soc@f1000000 { compatible = "simple-bus"; - ranges = <0 0xf1000000 0x4000000>; #address-cells = <1>; #size-cells = <1>; + interrupt-parent = <&intc>; + + ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */ + 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */ + 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */ + 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */ + 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */ + 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */ + 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ + 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ + + l2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0>; + }; + + intc: interrupt-controller { + compatible = "marvell,orion-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20204 0x04>, <0x20214 0x04>; + }; uart0: serial@12000 { compatible = "ns16550a"; @@ -56,11 +67,6 @@ status = "disabled"; }; - wdt: wdt@20300 { - compatible = "marvell,orion-wdt"; - reg = <0x20300 0x28>; - }; - gpio0: gpio@d0400 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; @@ -139,5 +145,14 @@ nr-ports = <1>; status = "disabled"; }; + + crypto: crypto@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>, + <0xc8000000 0x800>; + reg-names = "regs", "sram"; + interrupts = <31>; + status = "okay"; + }; }; }; |