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| author | Lukasz Majewski <l.majewski@samsung.com> | 2013-04-05 18:31:42 +0200 |
|---|---|---|
| committer | Chanho Park <chanho61.park@samsung.com> | 2014-11-18 11:42:58 +0900 |
| commit | 0017993a692431509e8e6d69fef52e38111f0a13 (patch) | |
| tree | 9ed9dd207c61d642798ce6b0b30f00442d92b04b /arch/arm/boot/dts | |
| parent | c47f2601c52d7c455e5f9c2c90c0c08c95a3ce1a (diff) | |
| download | linux-3.10-0017993a692431509e8e6d69fef52e38111f0a13.tar.gz linux-3.10-0017993a692431509e8e6d69fef52e38111f0a13.tar.bz2 linux-3.10-0017993a692431509e8e6d69fef52e38111f0a13.zip | |
ARM:clock:cpufreq: Correct MPLL clock and DTS binding
According to specification the mout_mpll_user_c clock shall be used instead
of sclk.
Moreover correct clock number (18) was assigned to mout_mpll_user_c.
It coply with ./Documentation/devicetree/bindings/clock/exynos4-clock.txt
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 1e016a95a1b..149c0ddf38b 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -333,7 +333,7 @@ cpufreq { compatible = "samsung,exynos-cpufreq"; - clocks = <&clock 12>, <&clock 19>, <&clock 9>, <&clock 20>; + clocks = <&clock 12>, <&clock 19>, <&clock 18>, <&clock 20>; clock-names = "arm_clk", "mout_core", "mout_mpll_user_c", "mout_apll"; status = "disabled"; |