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authorDan Williams <dan.j.williams@intel.com>2011-03-03 14:58:11 -0800
committerDan Williams <dan.j.williams@intel.com>2011-07-03 03:55:29 -0700
commitfe9a643157747cf85ecc07cd341e448c5849364f (patch)
tree15b7c012fc04d8bae1965ae429dbed872bb9d48e /Kconfig
parent27ce51df9a333ca7e05e09f6d25becf26ac1ff45 (diff)
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isci: pad stp and smp request sizes
Ross says: "The memory allocation for these requests doesn’t take into account the additional memory needed when the code in scic_sds_s[mst]p_request_assign_buffers() shifts the struct scu_task_context so that it is cache line aligned: In an example from my machine, total buffer that I’ve given to SCIC goes from 0x410024566f84 to 0x410024567308. From this same example, this call shifts my task_context_buffer from 0x410024567208 to 0x410024567240. This means that the task_context_buffer that used to range from 0x410024567208 to 0x410024567308 instead now goes from 0x410024567240 to 0x410024567340. When the memset() call at the end of scic_task_request_construct() clears out this task_context_buffer, it does so from 0x410024567240 to 0x410024567340, effectively killing whatever buffer follows this allocation in memory." djbw: Use the kernel's PTR_ALIGN instead of scic_sds_request_align_task_context_buffer() and SMP_CACHE_BYTES instead of the local CACHE_LINE_SIZE definition. TODO: These allocations really want to be better defined in a union rather than opaque buffers carved up by macros. Reported-by: Ross Zwisler <ross.zwisler@intel.com> Signed-off-by: Jacek Danecki <Jacek.Danecki@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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