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authorGen FUKATSU <fukatsu.gen@jp.panasonic.com>2005-09-30 16:09:17 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-09-30 16:09:17 +0100
commit217874feed0d3a6543a6b7127782f4a08bffd731 (patch)
tree88c9468bea86336ac5cf27fb72252bd3527b7cb3 /COPYING
parenta06f5466c4576dcbf838a50a87903b0082774da7 (diff)
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[ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S
Patch from Gen FUKATSU Invalidate BTB entry instruction flushes two instruction at a time. Therefore this instruction should be done four times after invalidate instruction cache line. Signed-off-by: Gen Fukatsu Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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