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authorRalf Baechle <ralf@linux-mips.org>2006-06-23 18:48:21 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-06-29 21:10:54 +0100
commit2e78ae3f48b2596797101fa365abd6348143299f (patch)
tree1de5c9ccca27ce0addd89e6e89da04ad406988e5
parentbeab375a48f0cd90eb08f04e2c1dad67b9e6d3f8 (diff)
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[MIPS] 74K: Assume it will also have an AR bit in config7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/mm/c-r4k.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 33b1451a365..75d887e8973 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1009,6 +1009,7 @@ static void __init probe_pcache(void)
break;
case CPU_24K:
case CPU_34K:
+ case CPU_74K:
if ((read_c0_config7() & (1 << 16))) {
/* effectively physically indexed dcache,
thus no virtual aliases. */