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authorJacek Anaszewski <j.anaszewski@samsung.com>2014-07-10 09:00:39 (GMT)
committerChanho Park <chanho61.park@samsung.com>2014-11-18 03:01:16 (GMT)
commit3fa4e5da2531b0b57ccc87abc69a87302ba2f98b (patch)
tree97e08c6a6909161a00b823fe1e099ef50671077c
parent4dfe3b7a922bc920c5cb984b2beb40cbc0480397 (diff)
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[media] s5p-mfc: Fix selective sclk_mfc init
fc906b6d "Remove special clock usage in driver" removed initialization of MFC special clock, arguing that there's no need to do it explicitly, since it's one of MFC gate clock's dependencies and gets enabled along with it. However, there's no promise of keeping this hierarchy across Exynos SoC releases, therefore this approach fails to provide a stable, portable solution. Out of all MFC versions, only v6 doesn't use special clock at all. For other versions log a message only in case clk_get fails, as not all the devices with the same MFC version require initializing the clock explicitly. Change-Id: Id5ee2696c7b880f45f9744b6bac603dcee9e3dcb Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_pm.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
index 9e238528..68bde3d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
@@ -21,6 +21,8 @@
#include "s5p_mfc_pm.h"
#define MFC_GATE_CLK_NAME "mfc"
+#define MFC_SCLK_NAME "sclk-mfc"
+#define MFC_SCLK_RATE (200 * 1000000)
#define CLK_DEBUG
@@ -50,6 +52,20 @@ int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
goto err_p_ip_clk;
}
+ if (dev->variant->version != MFC_VERSION_V6) {
+ pm->clock = clk_get(&dev->plat_dev->dev, MFC_SCLK_NAME);
+ if (IS_ERR(pm->clock)) {
+ mfc_info("Failed to get MFC special clock control\n");
+ } else {
+ clk_set_rate(pm->clock, MFC_SCLK_RATE);
+ ret = clk_prepare_enable(pm->clock);
+ if (ret) {
+ mfc_err("Failed to enable MFC special clock\n");
+ goto err_s_clk;
+ }
+ }
+ }
+
atomic_set(&pm->power, 0);
#ifdef CONFIG_PM_RUNTIME
pm->device = &dev->plat_dev->dev;
@@ -59,6 +75,9 @@ int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
atomic_set(&clk_ref, 0);
#endif
return 0;
+
+err_s_clk:
+ clk_put(pm->clock);
err_p_ip_clk:
clk_put(pm->clock_gate);
err_g_ip_clk:
@@ -67,6 +86,11 @@ err_g_ip_clk:
void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
{
+ if (dev->variant->version != MFC_VERSION_V6 &&
+ pm->clock) {
+ clk_disable_unprepare(pm->clock);
+ clk_put(pm->clock);
+ }
clk_unprepare(pm->clock_gate);
clk_put(pm->clock_gate);
#ifdef CONFIG_PM_RUNTIME