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authorClemens Ladisch <clemens@ladisch.de>2010-06-10 08:34:13 +0200
committerClemens Ladisch <clemens@ladisch.de>2010-06-10 08:34:13 +0200
commit27a2329f8235d6ce637463f5d83e98d760ef006e (patch)
treedcc3b1a62d92d407f38744a93914742e9eed1816
parenta48777e03ad53777ed119a5f86dd22a6c5a378ad (diff)
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firewire: add CSR BUSY_TIMEOUT support
Implement the BUSY_TIMEOUT register, which is required for nodes that support retries. Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
-rw-r--r--drivers/firewire/core-transaction.c14
-rw-r--r--drivers/firewire/ohci.c14
2 files changed, 24 insertions, 4 deletions
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 2a390726fa7..8146133818d 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -1115,6 +1115,17 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
rcode = RCODE_TYPE_ERROR;
break;
+ case CSR_BUSY_TIMEOUT:
+ if (tcode == TCODE_READ_QUADLET_REQUEST)
+ *data = cpu_to_be32(card->driver->
+ read_csr_reg(card, CSR_BUSY_TIMEOUT));
+ else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
+ card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
+ be32_to_cpu(*data));
+ else
+ rcode = RCODE_TYPE_ERROR;
+ break;
+
case CSR_BROADCAST_CHANNEL:
if (tcode == TCODE_READ_QUADLET_REQUEST)
*data = cpu_to_be32(card->broadcast_channel);
@@ -1140,9 +1151,6 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
BUG();
break;
- case CSR_BUSY_TIMEOUT:
- /* FIXME: Implement this. */
-
default:
rcode = RCODE_ADDRESS_ERROR;
break;
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 3d4badb7c79..9c588fd0125 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1731,7 +1731,8 @@ static int ohci_enable(struct fw_card *card,
reg_write(ohci, OHCI1394_ATRetries,
OHCI1394_MAX_AT_REQ_RETRIES |
(OHCI1394_MAX_AT_RESP_RETRIES << 4) |
- (OHCI1394_MAX_PHYS_RESP_RETRIES << 8));
+ (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) |
+ (200 << 16));
seconds = lower_32_bits(get_seconds());
reg_write(ohci, OHCI1394_IsochronousCycleTimer, seconds << 25);
@@ -2023,6 +2024,10 @@ static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
spin_unlock_irqrestore(&ohci->lock, flags);
return value;
+ case CSR_BUSY_TIMEOUT:
+ value = reg_read(ohci, OHCI1394_ATRetries);
+ return (value >> 4) & 0x0ffff00f;
+
default:
WARN_ON(1);
return 0;
@@ -2053,6 +2058,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
spin_unlock_irqrestore(&ohci->lock, flags);
break;
+ case CSR_BUSY_TIMEOUT:
+ value = (value & 0xf) | ((value & 0xf) << 4) |
+ ((value & 0xf) << 8) | ((value & 0x0ffff000) << 4);
+ reg_write(ohci, OHCI1394_ATRetries, value);
+ flush_writes(ohci);
+ break;
+
default:
WARN_ON(1);
break;