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authorminskey guo <chaohong.guo@linux.intel.com>2010-09-17 14:02:37 +0800
committerMatthew Garrett <mjg@redhat.com>2010-10-05 14:58:54 -0400
commit6230d18cc7c4c68b7a38ea73bf5910e7652e5b21 (patch)
tree80d8a9a68bd3818ed9231d38abb0d845c5c1d552
parent3c06806e690885ce978ef180c8f8b6f8c17fb4b4 (diff)
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seqno mask of THM_ITV register is 16bit
The mask of sequence number in THM_ITV register is 16bit width instead of 8bit. Signed-off-by: minskey guo <chaohong.guo@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Matthew Garrett <mjg@redhat.com>
-rw-r--r--drivers/platform/x86/intel_ips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c
index 9024480a822..fb317007e3e 100644
--- a/drivers/platform/x86/intel_ips.c
+++ b/drivers/platform/x86/intel_ips.c
@@ -230,7 +230,7 @@
#define THM_TC2 0xac
#define THM_DTV 0xb0
#define THM_ITV 0xd8
-#define ITV_ME_SEQNO_MASK 0x000f0000 /* ME should update every ~200ms */
+#define ITV_ME_SEQNO_MASK 0x00ff0000 /* ME should update every ~200ms */
#define ITV_ME_SEQNO_SHIFT (16)
#define ITV_MCH_TEMP_MASK 0x0000ff00
#define ITV_MCH_TEMP_SHIFT (8)