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| author | Alan Cox <alan@lxorguk.ukuu.org.uk> | 2008-02-08 15:25:10 +0000 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2008-02-11 14:30:07 -0500 |
| commit | 4194645079ca15679bf7e5b00e71561cf6864761 (patch) | |
| tree | 9bad1fda75a94cd0e40f6b166772c2a47277342b | |
| parent | 8397248d4662d77296889529c911e2182151afa9 (diff) | |
| download | linux-3.10-4194645079ca15679bf7e5b00e71561cf6864761.tar.gz linux-3.10-4194645079ca15679bf7e5b00e71561cf6864761.tar.bz2 linux-3.10-4194645079ca15679bf7e5b00e71561cf6864761.zip | |
pata_ninja32: setup changes
Forcibly set more of the configuration at init time. This seems to fix at
least one problem reported. We don't know what most of these bits do, but
we do know what windows stuffs there.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| -rw-r--r-- | drivers/ata/pata_ninja32.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c index 1c1b83541d1..15dd649f89e 100644 --- a/drivers/ata/pata_ninja32.c +++ b/drivers/ata/pata_ninja32.c @@ -17,6 +17,7 @@ * Base + 0x00 IRQ Status * Base + 0x01 IRQ control * Base + 0x02 Chipset control + * Base + 0x03 Unknown * Base + 0x04 VDMA and reset control + wait bits * Base + 0x08 BMIMBA * Base + 0x0C DMA Length @@ -174,8 +175,12 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id) ata_std_ports(&ap->ioaddr); iowrite8(0x05, base + 0x01); /* Enable interrupt lines */ - iowrite8(0xB3, base + 0x02); /* Burst, ?? setup */ - iowrite8(0x00, base + 0x04); /* WAIT0 ? */ + iowrite8(0xBE, base + 0x02); /* Burst, ?? setup */ + iowrite8(0x01, base + 0x03); /* Unknown */ + iowrite8(0x20, base + 0x04); /* WAIT0 */ + iowrite8(0x8f, base + 0x05); /* Unknown */ + iowrite8(0xa4, base + 0x1c); /* Unknown */ + iowrite8(0x83, base + 0x1d); /* BMDMA control: WAIT0 */ /* FIXME: Should we disable them at remove ? */ return ata_host_activate(host, dev->irq, ata_interrupt, IRQF_SHARED, &ninja32_sht); |