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authorHyungwon Hwang <human.hwang@samsung.com>2014-08-22 14:44:44 +0900
committerChanho Park <chanho61.park@samsung.com>2014-11-18 12:00:41 +0900
commit4321f6f188170e3461fe23064e5eb54a261af7f1 (patch)
tree4e62bbc25c2c15cb9651cbc5353130a93d0037fa
parentd99191642702d40261c4ad1d1c15681bcedb5fdc (diff)
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exynos/drm: gsc: fix build error related with write back
Fix the variable type and the macro name to make this driver buildable. Change-Id: I14f95c66db7bcfc8170e330e065f3de80c34ada8 Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gsc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 081ac5e71f1..870eb8ccb60 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -1533,7 +1533,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
struct drm_exynos_ipp_property *property;
struct drm_exynos_ipp_config *config;
struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX];
- struct drm_exynos_ipp_set_wb set_wb;
+ struct drm_exynos_display_set_wb set_wb;
u32 cfg;
int ret, i;
@@ -1577,7 +1577,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
set_wb.enable = 1;
set_wb.refresh = property->refresh_rate;
gsc_set_gscblk_fimd_wb(ctx, set_wb.enable);
- exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb);
+ exynos_drm_ippnb_send_event(EXYNOS_DISPLAY_OUTPUT_WB, (void *)&set_wb);
/* src local path */
cfg = gsc_read(GSC_IN_CON);
@@ -1628,7 +1628,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
static void gsc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd)
{
struct gsc_context *ctx = get_gsc_context(dev);
- struct drm_exynos_ipp_set_wb set_wb = {0, 0};
+ struct drm_exynos_display_set_wb set_wb = {0, 0};
u32 cfg;
DRM_DEBUG_KMS("%s:cmd[%d]\n", __func__, cmd);
@@ -1639,7 +1639,7 @@ static void gsc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd)
break;
case IPP_CMD_WB:
gsc_set_gscblk_fimd_wb(ctx, set_wb.enable);
- exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb);
+ exynos_drm_ippnb_send_event(EXYNOS_DISPLAY_OUTPUT_WB, (void *)&set_wb);
break;
case IPP_CMD_OUTPUT:
default: