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| author | Sachin Kamat <sachin.kamat@linaro.org> | 2014-05-13 07:13:44 +0900 |
|---|---|---|
| committer | Hyungwon Hwang <human.hwang@samsung.com> | 2014-12-17 16:18:10 +0900 |
| commit | b7fd84a3f46da8be3bd9246f28399d15fc9c3755 (patch) | |
| tree | 10fc80ad62cf8e48d93ceedc0252de766844e2cf | |
| parent | 7ff0c97dc984ab73833263f795bbe8108e4355be (diff) | |
| download | linux-3.10-b7fd84a3f46da8be3bd9246f28399d15fc9c3755.tar.gz linux-3.10-b7fd84a3f46da8be3bd9246f28399d15fc9c3755.tar.bz2 linux-3.10-b7fd84a3f46da8be3bd9246f28399d15fc9c3755.zip | |
ARM: EXYNOS: Map SYSRAM through generic DT bindings
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic DT SRAM bindings are
used for achieving this.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 08835f990e6..8a91a07da1a 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -110,6 +110,24 @@ }; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; + clock: clock-controller@10010000 { compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; |