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authorHyungwon Hwang <human.hwang@samsung.com>2014-12-17 05:37:58 (GMT)
committerHyungwon Hwang <human.hwang@samsung.com>2014-12-23 02:09:31 (GMT)
commit070b4f3ca66703115b7395bd08762341a6ee9c62 (patch)
treef52118e6a45611116c1f828be29998137f1df018
parent3c6a25821e28f3a64a81216cfc0d8834eee6d1d1 (diff)
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ARM: dts: exynos5420: remove the nodes and header files related audss
This patch removes the nodes and header files related audss which is not tested. Change-Id: I85792adccf7ef78a95185f5553220c4ea44813d0 Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi39
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index bfe056d..ac69acd 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -17,8 +17,6 @@
#include "exynos5.dtsi"
#include "exynos5420-pinctrl.dtsi"
-#include <dt-bindings/clock/exynos-audss-clk.h>
-
/ {
compatible = "samsung,exynos5420", "samsung,exynos5";
@@ -163,15 +161,6 @@
#clock-cells = <1>;
};
- clock_audss: audss-clock-controller@3810000 {
- compatible = "samsung,exynos5420-audss-clock";
- reg = <0x03810000 0x0C>;
- #clock-cells = <1>;
- clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
- <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
- clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
- };
-
mfc: codec@11000000 {
compatible = "samsung,mfc-v7";
reg = <0x11000000 0x10000>;
@@ -319,17 +308,6 @@
interrupt-parent = <&gic>;
ranges;
- adma: adma@03880000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x03880000 0x1000>;
- interrupts = <0 110 0>;
- clocks = <&clock_audss EXYNOS_ADMA>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <6>;
- #dma-requests = <16>;
- };
-
pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
@@ -382,23 +360,6 @@
};
};
- i2s0: i2s@03830000 {
- compatible = "samsung,exynos5420-i2s";
- reg = <0x03830000 0x100>;
- dmas = <&adma 0
- &adma 2
- &adma 1>;
- dma-names = "tx", "rx", "tx-sec";
- clocks = <&clock_audss EXYNOS_I2S_BUS>,
- <&clock_audss EXYNOS_I2S_BUS>,
- <&clock_audss EXYNOS_SCLK_I2S>;
- clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
- samsung,idma-addr = <0x03000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_bus>;
- status = "disabled";
- };
-
i2s1: i2s@12D60000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x12D60000 0x100>;