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authorSylwester Nawrocki <s.nawrocki@samsung.com>2014-07-02 15:40:58 +0200
committerMarek Szyprowski <m.szyprowski@samsung.com>2014-07-09 05:19:44 -0700
commitb11167e0b0c8d94bb452f8db5309517a460aac19 (patch)
tree8adaee1d70ac77cc97da0408a2788c715064d97f
parentb7391de5e8a48cc5fef5b7cc9ce5d854d80619c7 (diff)
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clk: samsung: Add suspend/resume pm ops for audss clk controller
Ensure the Exynos audio subsystem clock controller registers are preserved across suspend/resume. Change-Id: I57f4dcbbc9d02f7dfa2cd68508a9cefba010b9e5 Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-rw-r--r--drivers/clk/samsung/clk-exynos4-audss.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/clk/samsung/clk-exynos4-audss.c b/drivers/clk/samsung/clk-exynos4-audss.c
index 4522d000a5b..28c18d03ef9 100644
--- a/drivers/clk/samsung/clk-exynos4-audss.c
+++ b/drivers/clk/samsung/clk-exynos4-audss.c
@@ -51,22 +51,36 @@ static struct clk_onecell_data clk_data;
static void __iomem *io_base;
static struct clk *clks[AUDSS_CLK_MAX];
+#ifdef CONFIG_PM_SLEEP
+static unsigned long reg_save[][2] = {
+ { AUDSS_CLKSRC, 0 },
+ { AUDSS_CLKDIV, 0 },
+ { AUDSS_CLKGATE, 0 },
+};
+
static int samsung_audss_clk_suspend(void)
{
- /* TODO: */
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(reg_save); i++)
+ reg_save[i][1] = readl(io_base + reg_save[i][0]);
+
return 0;
}
static void samsung_audss_clk_resume(void)
{
- /* TODO: */
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(reg_save); i++)
+ writel(reg_save[i][1], io_base + reg_save[i][0]);
}
static struct syscore_ops samsung_audss_clk_syscore_ops = {
.suspend = samsung_audss_clk_suspend,
.resume = samsung_audss_clk_resume,
};
-
+#endif /* CONFIG_PM_SLEEP */
#ifdef CONFIG_OF
static struct of_device_id audss_of_match[] __initdata = {